Roman Lysecky
Title
Cited by
Cited by
Year
Dynamic hardware/software partitioning: A first approach
G Stitt, R Lysecky, F Vahid
Proceedings of the 40th annual Design Automation Conference, 250-255, 2003
2032003
A self-tuning cache architecture for embedded systems
C Zhang, F Vahid, R Lysecky
ACM Transactions on Embedded Computing Systems (TECS) 3 (2), 407-425, 2004
1722004
Warp processors
R Lysecky, G Stitt, F Vahid
ACM Transactions on Design Automation of Electronic Systems (TODAES) 11 (3 …, 2004
1702004
Security challenges for medical devices
J Sametinger, J Rozenblit, R Lysecky, P Ott
Communications of the ACM 58 (4), 74-82, 2015
1472015
A study of the speedups and competitiveness of FPGA soft processor cores using dynamic hardware/software partitioning
R Lysecky, F Vahid
Design, Automation and Test in Europe, 18-23, 2005
1412005
Warp processing: Dynamic translation of binaries to FPGA circuits
F Vahid, G Stitt, R Lysecky
Computer 41 (7), 40-46, 2008
1082008
Digital design
F Vahid, J Wiley
Wiley, 2007
105*2007
Dynamic FPGA routing for just-in-time FPGA compilation
R Lysecky, F Vahid, SXD Tan
Proceedings of the 41st annual design automation conference, 954-959, 2004
862004
A configurable logic architecture for dynamic hardware/software partitioning
R Lysecky, F Vahid
Proceedings Design, Automation and Test in Europe Conference and Exhibition …, 2004
852004
Firm-core virtual FPGA for just-in-time FPGA compilation
RL Lysecky, K Miller, F Vahid, KA Vissers
FPGA, 271, 2005
79*2005
Application-specific customization of parameterized FPGA soft-core processors
D Sheldon, R Kumar, R Lysecky, F Vahid, D Tullsen
2006 IEEE/ACM International Conference on Computer Aided Design, 261-268, 2006
662006
Design and implementation of a MicroBlaze-based warp processor
R Lysecky, F Vahid
ACM Transactions on Embedded Computing Systems (TECS) 8 (3), 1-22, 2009
582009
Student performance improvement using interactive textbooks: A three-university cross-semester analysis
A Edgcomb, F Vahid, R Lysecky, A Knoesen, R Amirtharajah, ML Dorf
the Proceedings of the ASEE Annual Meeting, 2015
502015
On-chip logic minimization
R Lysecky, F Vahid
Proceedings of the 40th annual Design Automation Conference, 334-337, 2003
452003
Are commercially implemented adaptive cruise control systems string stable?
G Gunter, D Gloudemans, RE Stern, S McQuade, R Bhadani, M Bunting, ...
IEEE Transactions on Intelligent Transportation Systems, 2020
352020
Workload assignment considering NBTI degradation in multicore systems
J Sun, R Lysecky, K Shankar, A Kodi, A Louri, J Roveda
ACM Journal on Emerging Technologies in Computing Systems (JETC) 10 (1), 1-22, 2014
322014
A study of the scalability of on-chip routing for just-in-time FPGA compilation
R Lysecky, F Vahid, SDX Tan
13th Annual IEEE Symposium on Field-Programmable Custom Computing Machines …, 2005
322005
Getting students to earnestly do reading, studying, and homework in an introductory programming class
A Edgcomb, F Vahid, R Lysecky, S Lysecky
Proceedings of the 2017 ACM SIGCSE Technical Symposium on Computer Science …, 2017
292017
A study on the loop behavior of embedded programs
J Villarreal, R Lysecky, S Cotterell, F Vahid
University of California, Riverside, Tech. Rep. UCR-CSE-01-03, 2001
282001
Prefetching for improved bus wrapper performance in cores
R Lysecky, F Vahid
ACM Transactions on Design Automation of Electronic Systems (TODAES) 7 (1 …, 2002
272002
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