Stefanos Kaxiras
Stefanos Kaxiras
IEEE Fellow, Professor Uppsala University
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Cited by
Cited by
Cache decay: Exploiting generational behavior to reduce cache leakage power
S Kaxiras, Z Hu, M Martonosi
Proceedings of the 28th annual international symposium on Computer …, 2001
Computer architecture techniques for power-efficiency
S Kaxiras, M Martonosi
Springer Nature, 2022
Timekeeping in the memory system: predicting and optimizing memory behavior
Z Hu, S Kaxiras, M Martonosi
ACM SIGARCH Computer Architecture News 30 (2), 209-220, 2002
Cache replacement based on reuse-distance prediction
G Keramidas, P Petoumenos, S Kaxiras
2007 25th International Conference on Computer Design, 245-250, 2007
Green governors: A framework for continuously adaptive dvfs
V Spiliopoulos, S Kaxiras, G Keramidas
2011 International Green Computing Conference and Workshops, 1-8, 2011
Complexity-effective multicore coherence
A Ros, S Kaxiras
Proceedings of the 21st international conference on Parallel architectures …, 2012
Splash-3: A properly synchronized benchmark suite for contemporary research
C Sakalis, C Leonardsson, S Kaxiras, A Ros
2016 IEEE International Symposium on Performance Analysis of Systems and …, 2016
Improving CC-NUMA performance using instruction-based prediction
S Kaxiras, JR Goodman
Proceedings Fifth International Symposium on High-Performance Computer …, 1999
TCP: Tag correlating prefetchers
Z Hu, M Martonosi, S Kaxiras
The Ninth International Symposium on High-Performance Computer Architecture …, 2003
Interval-based models for run-time DVFS orchestration in superscalar processors
G Keramidas, V Spiliopoulos, S Kaxiras
Proceedings of the 7th ACM international conference on Computing frontiers …, 2010
Efficient invisible speculative execution through selective delay and value prediction
C Sakalis, S Kaxiras, A Ros, A Jimborean, M Själander
Proceedings of the 46th International Symposium on Computer Architecture …, 2019
System and method for simplifying cache coherence using multiple write policies
S Kaxiras, A Ros
US Patent 9,274,960, 2016
SARC coherence: Scaling directory cache coherence in performance and power
S Kaxiras, G Keramidas
IEEE micro 30 (5), 54-65, 2010
Multiple processor, distributed memory computer with out-of-order processing
DC Burger, S Kaxiras, JR Goodman
US Patent 6,161,170, 2000
Coherence communication prediction in shared-memory multiprocessors
S Kaxiras, C Young
Proceedings Sixth International Symposium on High-Performance Computer …, 2000
A new perspective for efficient virtual-cache coherence
S Kaxiras, A Ros
Proceedings of the 40th Annual International Symposium on Computer …, 2013
Let caches decay: reducing leakage energy via exploitation of cache generational behavior
Z Hu, S Kaxiras, M Martonosi
ACM Transactions on Computer Systems (TOCS) 20 (2), 161-190, 2002
Comparing power consumption of an SMT and a CMP DSP for mobile phone workloads
S Kaxiras, G Narlikar, AD Berenbaum, Z Hu
Proceedings of the 2001 international conference on Compilers, architecture …, 2001
The load slice core microarchitecture
TE Carlson, W Heirman, O Allam, S Kaxiras, L Eeckhout
Proceedings of the 42nd Annual International Symposium on Computer …, 2015
Non deterministic caches: A simple and effective defense against side channel attacks
G Keramidas, A Antonopoulos, DN Serpanos, S Kaxiras
Design Automation for Embedded Systems 12, 221-230, 2008
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