Follow
Kihoon Nam
Kihoon Nam
Electrical Engineering, POSTECH
Verified email at postech.ac.kr
Title
Cited by
Cited by
Year
Origin of incremental step pulse programming (ISPP) slope degradation in charge trap nitride based multi-layer 3D NAND flash
K Nam, C Park, JS Yoon, H Jang, MS Park, J Sim, RH Baek
Solid-State Electronics 175, 107930, 2021
152021
Channel thickness and grain size engineering for improvement of variability and performance in 3-D NAND flash memory
K Nam, C Park, JS Yoon, G Yang, MS Park, RH Baek
IEEE Transactions on Electron Devices 69 (7), 3681-3687, 2022
82022
Holistic optimization of trap distribution for performance/reliability in 3-D NAND flash using machine learning
K Nam, C Park, H Yun, JS Yoon, H Jang, K Cho, MS Park, HC Choi, ...
IEEE Access 11, 7135-7144, 2023
62023
Bi-directional long short-term memory neural network modeling of data retention characterization in 3-D triple-level cell NAND flash memory
H Jang, C Park, K Nam, H Yun, K Cho, JS Yoon, HC Choi, HJ Kang, ...
IEEE Transactions on Electron Devices 69 (8), 4241-4247, 2022
42022
Quantitative analysis of irregular channel shape effects on charge-trapping efficiency using massive 3D NAND data
C Park, JS Yoon, K Nam, H Jang, MS Park, RH Baek
Materials Science in Semiconductor Processing 157, 107333, 2023
32023
Forward body bias technique in DRAM peripheral transistor at cryogenic temperature for quantum computing applications
H You, J An, K Nam, B Kang, J Park, N Lee, S Lee, RH Baek
2023 7th IEEE Electron Devices Technology & Manufacturing Conference (EDTM), 1-3, 2023
22023
Optimal Energetic-Trap Distribution of Nano-Scaled Charge Trap Nitride for Wider Vth Window in 3D NAND Flash Using a Machine-Learning Method
K Nam, C Park, JS Yoon, H Yun, H Jang, K Cho, HJ Kang, MS Park, J Sim, ...
Nanomaterials 12 (11), 1808, 2022
22022
Enhancement of ISPP Efficiency Using Neural Network-Based Optimization of 3-D NAND Cell
K Cho, H Yun, K Nam, C Park, H Jang, JS Yoon, HC Choi, MS Park, ...
IEEE Transactions on Electron Devices, 2023
12023
Improved ISPP scheme for narrow threshold voltage distribution in 3-D NAND flash memory
G Yang, C Park, K Nam, D Kim, MS Park, RH Baek
Solid-State Electronics 202, 108607, 2023
12023
Extraction of device structural parameters through DC/AC performance using an MLP neural network algorithm
H Jang, H Yun, C Park, K Cho, K Nam, JS Yoon, HC Choi, RH Baek
IEEE Access 10, 64408-64419, 2022
12022
Analysis of mechanical stress on Fowler-Nordheim tunneling for program operation in 3D NAND flash memory
D Kim, K Nam, C Park, H You, MS Park, Y Kim, S Park, RH Baek
Solid-State Electronics, 108927, 2024
2024
Cryogenic Body Bias Effect in DRAM Peripheral and Buried-Channel-Array Transistor for Quantum Computing Applications
H You, K Nam, J An, C Park, D Kim, S Lee, N Lee, RH Baek
IEEE Access, 2024
2024
Bidirectional Precharge and Negative Bias Scheme for Program Disturbance Suppression in 3-D NAND Flash Memory
K Nam, C Park, D Kim, S Lee, N Lee, RH Baek
IEEE Transactions on Electron Devices, 2023
2023
Optimization of Process Parameters on Short-Term Retention for Charge-Trapping 3-D nand Flash Memories Using Novel Neural Networks Approach
H Jang, K Nam, H Yun, K Cho, S Eom, MS Park, RH Baek
IEEE Transactions on Electron Devices, 2023
2023
Investigation of Program Efficiency Overshoot in 3D Vertical Channel NAND Flash with Randomly Distributed Traps
C Park, JS Yoon, K Nam, H Jang, M Park, RH Baek
Nanomaterials 13 (9), 1451, 2023
2023
Improving Program Efficiency of 3D NAND Cell Structure Based on Artificial Neural Network
K Cho, H Yun, H Jang, K Nam, C Park, JS Yoon, HC Choi, RH Baek
대한전자공학회 학술대회, 70-75, 2021
2021
The system can't perform the operation now. Try again later.
Articles 1–16