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Harald Devos
Harald Devos
Unknown affiliation
Verified email at UGent.be
Title
Cited by
Cited by
Year
Finding and applying loop transformations for generating optimized FPGA implementations
H Devos, K Beyls, M Christiaens, J Van Campenhout, EH D’Hollander, ...
Transactions on High-Performance Embedded Architectures and Compilers I, 159-178, 2007
392007
Optimizing the FPGA memory design for a sobel edge detector
CT Moore, H Devos, D Stroobandt
20th Annual Workshop on Circuits, Systems and Signal Processing (ProRISC …, 2009
252009
Reconfigurable hardware for a scalable wavelet video decoder and its performance requirements
D Stroobandt, H Eeckhaut, H Devos, M Christiaens, F Verdicchio, ...
Computer Systems: Architectures, Modeling, and Simulation: Third and Fourth …, 2004
192004
Scalable, wavelet-based video: From server to hardware-accelerated client
H Eeckhaut, H Devos, P Lambert, D De Schrijver, W Van Lancker, ...
IEEE Transactions on Multimedia 9 (7), 1508-1519, 2007
182007
A benchmark CAD mobile phone model for specific absorption rate calculations
V Monebhurrun, Y Braux, H Devos, M Kozlov, W Simon, T Wittig
IEEE Transactions on Magnetics 50 (2), 1057-1060, 2014
172014
A hardware-friendly wavelet entropy codec for scalable video
H Eeckhaut, H Devos, B Schrauwen, M Christiaens, D Stroobandt
Design, Automation and Test in Europe, 14-19, 2005
162005
Performance requirements for reconfigurable hardware for a scalable wavelet video decoder
H Devos, H Eeckhaut, M Christiaens, F Verdicchio, D Stroobandt, ...
122003
From loop transformation to hardware generation
H Devos, K Beyls, M Christiaens, J Van Campenhout, D Stroobandt
Proceedings of the 17th ProRISC Workshop, 249-255, 2006
112006
Building an application-specific memory hierarchy on FPGA
H Devos, J Van Campenhout, D Stroobandt
2nd HiPEAC Workshop on Reconfigurable Computing, 53-62, 2008
102008
Implementing a hardware-friendly wavelet entropy codec for scalable video
H Eeckhaut, M Christiaens, H Devos, D Stroobandt
Wavelet Applications in Industrial Processing III 6001, 169-179, 2005
102005
Loop transformations for the optimized generation of reconfigurable hardware
H Devos
Ghent University, 2008
72008
Improving the hardware friendliness of a wavelet based scalable video codec
H Eeckhaut, D Stroobandt, H Devos, M Christiaens
62005
Embedding smart buffers for window operations in a stream-oriented C-to-VHDL compiler
F Diet, EH D'Hollander, K Beyls, H Devos
4th IEEE International Symposium on Electronic Design, Test and Applications …, 2008
52008
Ever considered SystemC
H Devos, H Eeckhaut, B Schrauwen, M Christiaens, D Stroobandt
Proceedings of the 15th ProRISC Workshop, 358-363, 2004
52004
Polymorphic circuit simulation system
KK Banka, P Sarkar, H Devos, P Niday, IIJRK Lefebvre, A Kumar, ...
US Patent 9,317,638, 2016
42016
Constructing application-specific memory hierarchies on FPGAs
H Devos, J Van Campenhout, I Verbauwhede, D Stroobandt
Transactions on high-performance embedded architectures and compilers III …, 2011
42011
Automatic tool flow for shift-register-LUT reconfiguration: making run-time reconfiguration fast and easy
B Al Farisi, K Bruneel, H Devos, D Stroobandt
Proceedings of the 18th annual ACM/SIGDA international symposium on Field …, 2010
42010
CLooGVHDL and JCCI
H Devos, W Meeus, D Stroobandt
Design, Automation and Test in Europe Conference and Exhibition, 2009
42009
Applying parameterizable dynamic configurations to sequence alignment
T Davidson, K Bruneel, H Devos, D Stroobandt
Parallel Computing: From Multicores and GPU's to Petascale, 616-623, 2010
32010
FPGA resource estimation for loop controllers
T Degryse, H Devos, D Stroobandt
Proceedings of the 6th Workshop on Optimizations for DSP and Embedded …, 2008
32008
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Articles 1–20