Hamilton Carrillo-Nuñez
Hamilton Carrillo-Nuñez
Senior Software Engineer / Computational Science at Fluxim AG
Verified email at iis.ee.ethz.ch
Title
Cited by
Cited by
Year
Modeling direct band-to-band tunneling: From bulk to quantum-confined semiconductor devices
H Carrillo-Nuñez, A Ziegler, M Luisier, A Schenk
Journal of Applied Physics 117 (23), 234501, 2015
202015
Analysis of InAs-Si heterojunction nanowire tunnel FETs: Extreme confinement vs. bulk
H Carrillo-Nuñez, M Luisier, A Schenk
Solid-State Electronics 113, 61-67, 2015
172015
Analysis of InAs-Si Heterojunction Nanowire Tunnel FETs: Extreme Confinement vs. Bulk
H Carrillo-Nuñez, M Luisier, A Schenk
ESSDERC, Venice, Italy, 2014
172014
Phonon-limited performance of single-layer, single-gate black phosphorus n - and p -type field-effect transistors
A Szabo, R Rhyner, H Carrillo-Nunez, M Luisier
2015 IEEE International Electron Devices Meeting (IEDM), 12.1.1 - 12.1.4, 2015
132015
Influence of electron–phonon interactions in single dopant nanowire transistors
H Carrillo-Nuñez, M Bescond, N Cavassilas, E Dib, M Lannoo
Journal of Applied Physics 116, 164505, 2014
122014
NESS: new flexible Nano-Electronic Simulation Software
S Berrada, H Carrillo-Nunez, T Dutta, M Duan, F Adamu-Lema, J Lee, ...
2018 International Conference on Simulation of Semiconductor Processes and …, 2018
112018
Localization of electronic states in finite ladder models: Participation ratio and localization length as measures of the wave-function extension
H Carrillo-Nuñez, PA Schulz
Physical Review B 78 (23), 235404, 2008
92008
CMOS Nanoelectronics: Innovative Devices, Architectures, and Applications
N Collaert
CRC Press, 2012
82012
Impact of Randomly Distributed Dopants on -Gate Junctionless Silicon Nanowire Transistors
H Carrillo-Nunez, MM Mirza, DJ Paul, DA MacLaren, A Asenov, ...
IEEE Transactions on Electron Devices 65 (5), 1692-1698, 2018
72018
Simulation of the impact of ionized impurity scattering on the total mobility in Si nanowire transistors
T Sadi, C Medina-Bailon, M Nedjalkov, J Lee, O Badami, S Berrada, ...
Materials 12 (1), 124, 2019
62019
Effect of surface roughness and phonon scattering on extremely narrow InAs-Si Nanowire TFETs
H Carrillo-Nunez, R Rhyner, M Luisier, A Schenk
2016 46th European Solid-State Device Research Conference (ESSDERC), 188-191, 2016
62016
A simplified quantum mechanical model for nanowire transistors based on non-linear variational calculus
H Carrillo-Nuñez, W Magnus, FM Peeters
Journal of Applied Physics 108 (6), 063708, 2010
62010
Understanding electromigration in Cu-CNT composite interconnects: A multiscale electrothermal simulation study
J Lee, S Berrada, F Adamu-Lema, N Nagy, VP Georgiev, T Sadi, J Liang, ...
IEEE Transactions on Electron Devices 65 (9), 3884-3892, 2018
52018
Comprehensive study of cross-section dependent effective masses for silicon based gate-all-around transistors
O Badami, C Medina-Bailon, S Berrada, H Carrillo-Nunez, J Lee, ...
Applied Sciences 9 (9), 1895, 2019
32019
Variability Predictions for the Next Technology Generations of n-type SixGe1− x Nanowire MOSFETs
J Lee, O Badami, H Carrillo-Nuñez, S Berrada, C Medina-Bailon, T Dutta, ...
Micromachines 9 (12), 643, 2018
32018
Study of the 1D Scattering Mechanisms' Impact on the Mobility in Si Nanowire Transistors
C Medina-Bailon, T Sadi, M Nedjalkov, J Lee, S Berrada, ...
2018 Joint International EUROSOI Workshop and International Conference on …, 2018
32018
Design of High-Performance InAs-Si Heterojunction 2D-2D Tunnel FETs With Lateral and Vertical Tunneling Paths
H Carrillo-Nuñez, M Luisier, A Schenk
IEEE Transactions on Electron Devices 63 (12), 5041 - 5047, 2016
32016
Drift-diffusion quantum corrections for In0.53Ga0.47As double gate ultra-thin-body FETs
P Aguirre, H Carrillo-Nuñez, A Ziegler, M Luisier, A Schenk
2016 International Conference on Simulation of Semiconductor Processes and …, 2016
32016
Size and temperature dependence of the electron-phonon scattering by donors in nanowire transistors
M Bescond, H Carrillo-Nuñez, S Berrada, N Cavassilas, M Lannoo
Solid-State Electronics 112, 1-7, 2016
32016
Analysis of InAs-Si Heterojunction Double-Gate Tunnel FETs with Vertical Tunneling Paths
H Carrillo-Nuñez, M Luisier, A Schenk
Proceeding of ESSDERC, Graz, Austria, 2015
32015
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Articles 1–20