| Moore's law: the future of Si microelectronics SE Thompson, S Parthasarathy Materials today 9 (6), 20-25, 2006 | 994 | 2006 |
| A 10nm high performance and low-power CMOS technology featuring 3rd generation FinFET transistors, Self-Aligned Quad Patterning, contact over active gate … C Auth, A Aliyarukunju, M Asoro, D Bergstrom, V Bhagwat, J Birdsall, ... 2017 IEEE International Electron Devices Meeting (IEDM), 29.1. 1-29.1. 4, 2017 | 414 | 2017 |
| Future of strained Si/semiconductors in nanoscale MOSFETs SE Thompson, S Suthram, Y Sun, G Sun, S Parthasarathy, M Chu, ... 2006 International Electron Devices Meeting, 1-4, 2006 | 107 | 2006 |
| Physics of process induced uniaxially strained Si Y Sun, G Sun, S Parthasarathy, SE Thompson Materials Science and Engineering: B 135 (3), 179-183, 2006 | 41 | 2006 |
| Strain additivity in III-V channels for CMOSFETs beyond 22nm technology node S Suthram, Y Sun, P Majhi, I Ok, H Kim, HR Harris, N Goel, ... 2008 Symposium on VLSI Technology, 182-183, 2008 | 39 | 2008 |
| Extraction of AlGaN/GaN HEMT gauge factor in the presence of traps AD Koehler, A Gupta, M Chu, S Parthasarathy, KJ Linthicum, JW Johnson, ... IEEE Electron device letters 31 (7), 665-667, 2010 | 32 | 2010 |
| Dual channel FinFETs as a single high-k/metal gate solution beyond 22nm node CE Smith, H Adhikari, SH Lee, B Coss, S Parthasarathy, C Young, ... 2009 IEEE International Electron Devices Meeting (IEDM), 1-4, 2009 | 27 | 2009 |
| CMOS band-edge schottky barrier heights using dielectric-dipole mitigated (DDM) metal/Si for source/drain contact resistance reduction BE Coss, WY Loh, J Oh, G Smith, C Smith, H Adhikari, B Sassman, ... 2009 Symposium on VLSI Technology, 104-105, 2009 | 24 | 2009 |
| Mechanisms for low on-state current of Ge (SiGe) nMOSFETs: A comparative study on gate stack, resistance, and orientation-dependent effective masses J Oh, I Ok, CY Kang, M Jamil, SH Lee, WY Loh, J Huang, B Sassman, ... 2009 Symposium on VLSI Technology, 238-239, 2009 | 19 | 2009 |
| High mobility SiGe shell-Si core omega gate pFETS H Adhikari, HR Harris, CE Smith, JW Yang, B Coss, S Parthasarathy, ... 2009 International Symposium on VLSI Technology, Systems, and Applications …, 2009 | 11 | 2009 |
| Temperature dependence of enhanced hole mobility in uniaxial strained p-channel metal-oxide-semiconductor field-effect transistors and insight into the physical mechanisms X Yang, S Parthasarathy, Y Sun, A Koehler, T Nishida, SE Thompson Applied Physics Letters 93 (24), 2008 | 9 | 2008 |
| Strain engineering in nanoscale CMOS FinFETs and methods to optimize RS/D C Smith, S Parthasarathy, BE Coss, J Williams, H Adhikari, G Smith, ... Proceedings of 2010 International Symposium on VLSI Technology, System and …, 2010 | 7 | 2010 |
| Strain effects in AlGaN/GaN HEMTs M Chu, AD Koehler, A Gupta, S Parthasarathy, MO Baykan, SE Thompson, ... Materials and Reliability Handbook for Semiconductor Optical and Electron …, 2013 | 4 | 2013 |
| Strain effects in long to short channel mosfets: From drift-diffusion to quasi-ballistic transport S Parthasarathy University of Florida, 2012 | | 2012 |
