Kristof Du Bois
Kristof Du Bois
Verified email at intel.com
Title
Cited by
Cited by
Year
Criticality Stacks: Identifying Critical Threads in Parallel Programs using Synchronization Behavior
K Du Bois, S Eyerman, JB Sartor, L Eeckhout
International Symposium on Computer Architecture (ISCA), 2013
852013
Speedup Stacks: Identifying Scaling Bottlenecks in Multi-Threaded Applications
S Eyerman, K Du Bois, L Eeckhout
IEEE International Symposium on Performance Analysis of Systems and Software …, 2012
612012
Bottle Graphs: Visualizing Scalability Bottlenecks in Multi-Threaded Applications
K Du Bois, JB Sartor, S Eyerman, L Eeckhout
ACM SIGPLAN 2013 Conference on Object Oriented Programming, Systems …, 2013
472013
Per-thread cycle accounting in multicore processors
K Du Bois, S Eyerman, L Eeckhout
ACM Transactions on Architecture and Code Optimization (TACO) 9 (4), 1-22, 2013
332013
Independent tuning of multiple hardware prefetchers
W Heirman, K Du Bois, Y VANDRIESSCHE, S EYERMAN, I Hur
US Patent App. 15/718,845, 2019
27*2019
SWEEP: Evaluating computer system energy efficiency using synthetic workloads
K Du Bois, T Schaeps, S Polfliet, F Ryckbosch, L Eeckhout
International Conference on High Performance and Embedded Architectures and …, 2011
152011
Many-Core Graph Workload Analysis
S Eyerman, W Heirman, K Du Bois, JB Fryman, I Hur
International Conference for High Performance Computing, Networking, Storage …, 2018
62018
Near-Side Prefetch Throttling: Adaptive Prefetching for High-Performance Many-Core Processors
W Heirman, K Du Bois, Y Vandriessche, S Eyerman, I Hur
International Conference on Parallel Architectures and Compilation …, 2018
22018
Technologies for processor simulation modeling with machine learning
Y Vandriessche, W Heirman, I Hur, K Du Bois, S Eyerman
US Patent App. 15/638,727, 2019
12019
Multi-stage cpi stacks
S Eyerman, W Heirman, K Du Bois, I Hur
IEEE Computer Architecture Letters 17 (1), 55-58, 2017
12017
Analyzing the Scalability of Managed Language Applications with Speedup Stacks
JB Sartor, K Du Bois, S Eyerman, L Eeckhout
IEEE International Symposium on Performance Analysis of Systems and Software …, 2017
12017
APPARATUS, METHOD, AND SYSTEM FOR ENHANCED DATA PREFETCHING BASED ON NON-UNIFORM MEMORY ACCESS (NUMA) CHARACTERISTICS
W Heirman, I Hur, U Echeruo, S Eyerman, K Du Bois
US Patent App. 16/837,833, 2020
2020
System, Apparatus And Method For Dynamic Automatic Sub-Cacheline Granularity Memory Access Control
W Heirman, S Eyerman, K Du Bois, I Hur, JB Fryman
US Patent App. 16/203,891, 2020
2020
Apparatus, method, and system for enhanced data prefetching based on non-uniform memory access (NUMA) characteristics
W Heirman, I Hur, U Echeruo, S Eyerman, K Du Bois
US Patent 10,621,099, 2020
2020
Indirect memory fetcher
S EYERMAN, W Heirman, K Du Bois, I Hur, JB Fryman
US Patent App. 15/996,184, 2019
2019
Storing cache lines in dedicated cache of an idle core
W Heirman, K Du Bois, Y Vandriessche, S Eyerman, I Hur, E Hallnor
US Patent App. 15/940,712, 2019
2019
Extending the Performance Analysis Tool Box: Multi-stage CPI Stacks and FLOPS Stacks
S Eyerman, W Heirman, K Du Bois, I Hur
IEEE International Symposium on Performance Analysis of Systems and Software …, 2018
2018
Performance Analysis Methods for Understanding Scaling Bottlenecks in Multi-Threaded Applications
K Du Bois
PhD thesis, 2014
2014
Energie-prestatieanalyse van computersystemen met behulp van synthetische benchmarks
K Du Bois, T Schaeps
2010
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Articles 1–19