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Bomsoo Kim
Bomsoo Kim
Principal Engineer, Samsung Electronics
Verified email at us.ibm.com
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Year
A 10nm platform technology for low power and high performance application featuring FINFET devices with multi workfunction gate stack on bulk and SOI
KI Seo, B Haran, D Gupta, D Guo, T Standaert, R Xie, H Shang, E Alptekin, ...
2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical …, 2014
1082014
Field effect transistors including fin structures with different doped regions and semiconductor devices including the same
C Oh, MG Kang, B Kim, J Yoon
US Patent App. 13/615,671, 2013
602013
Nanowire Field Effect Transistors: Principles and Applications
DM Kim, YH Jeong
Springer, 2014
472014
Semiconductor device having gate electrode with spacers on fin structure and silicide layer filling the recess
D Bae, B Kim, Y Cho
US Patent 9,525,036, 2016
222016
Silicon germanium FinFET device physics, process integration and modeling considerations
D Lu, P Morin, B Sahu, TB Hook, P Hashemi, A Scholze, B Kim, P Kerber, ...
ECS Transactions 64 (6), 337, 2014
172014
Semiconductor device having a gate all around structure and a method for fabricating the same
SD Suk, KIM Bom-Soo, K Seo
US Patent 9,679,965, 2017
142017
Field effect transistors including fin structures with different doped regions and semiconductor devices including the same
C Oh, MG Kang, B Kim, J Yoon
US Patent 9,653,551, 2017
142017
Semiconductor devices having fin field effect transistors with a single liner pattern in a first region and a dual liner pattern in a second region and methods for …
K Seo, B Kim, JH Cha
US Patent App. 14/831,087, 2017
112017
Edge profile effect of tunnel oxide on erase threshold-voltage distributions in flash memory cells
B Kim, WH Kwon, CK Baek, Y Son, CK Park, K Kim, DM Kim
IEEE transactions on electron devices 53 (12), 3012-3019, 2006
112006
10nm FINFET technology for low power and high performance applications
D Guo, H Shang, K Seo, B Haran, T Standaert, D Gupta, E Alptekin, D Bae, ...
2014 12th IEEE International Conference on Solid-State and Integrated …, 2014
82014
Investigation of fixed oxide charge and fin profile effects on bulk FinFET device characteristics
B Kim, DI Bae, P Zeitzoff, X Sun, TE Standaert, N Tripathi, A Scholze, ...
IEEE electron device letters 34 (12), 1485-1487, 2013
72013
Reliable extraction of cycling induced interface states implementing realistic P/E stresses in reference cell: Comparison with Flash memory cell
CK Baek, B Kim, Y Son, W Kwon, CK Park, YJ Park, HS Min, DM Kim
IEEE electron device letters 27 (3), 169-171, 2006
52006
Silicon nanowire field-effect transistor
DM Kim, B Kim, RH Baek
Nanowire Field Effect Transistors: Principles and Applications, 63-87, 2014
42014
Highly reliable 256 Mb NOR Flash MLC with self-aligned process and controlled edge profile
WH Kwon, JI Han, B Kim, CK Baek, SP Sim, WH Lee, JH Han, C Jung, ...
Proc. Int. Conf. SSDM, 448-449, 2005
42005
Three-dimensional simulation of dopant-fluctuation-induced threshold voltage dispersion in nonplanar MOS structures targeting flash EEPROM transistors
B Kim, W Kwon, CK Baek, S Jin, Y Song, DM Kim
IEEE transactions on electron devices 55 (6), 1456-1463, 2008
32008
Simple experimental determination of the spread of trapped hot holes injected in Silicon-Oxide-Nitride-Oxide-Silicon (SONOS) cells: optimized erase and cell shrinkage
B Kim, CK Baek, W Kwon, YH Jeong, DM Kim
Japanese journal of applied physics 43 (12B), L1611, 2004
32004
Spatial and temporal characterization of programming charge in SONOS memory cell: Effects of localized electron trapping
B Kim, CK Baek, W Kwon, J Lee, YH Jeong, DM Kim
Japanese journal of applied physics 43 (12B), L1581, 2004
32004
Semiconductor device and method of fabricating the same
S Suk, KIM Bom-Soo
US Patent App. 14/802,843, 2017
22017
Characterization of near-interface oxide trap density in remote plasma nitrided oxides for nano-scale MOSFETs
Y Son, CK Baek, B Kim, IS Han, TG Goo, O You, W Choi, HH Ji, HD Lee, ...
2006 IEEE Nanotechnology Materials and Devices Conference 1, 510-511, 2006
2006
Near Surface Oxide Trap Density Profiling in NO and Remote Plasma Nitrided Oxides in Nano-Scale MOSFETs, Using Multi-Temperature Charge Pumping Technique: N~ o~ t vs. Oxide …
Y Son, CK Baek, B Kim, IS Han, TG Goo, HD Lee, DM Kim
SOLID STATE DEVICES AND MATERIALS 2006, 422, 2006
2006
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