| FireSim: FPGA-accelerated cycle-exact scale-out system simulation in the public cloud S Karandikar, H Mao, D Kim, D Biancolin, A Amid, D Lee, N Pemberton, ... 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture …, 2018 | 74 | 2018 |
| From software to accelerators with LegUp high-level synthesis A Canis, J Choi, B Fort, R Lian, Q Huang, N Calagar, M Gort, JJ Qin, ... 2013 International Conference on Compilers, Architecture and Synthesis for …, 2013 | 55 | 2013 |
| The effect of compiler optimizations on high-level synthesis for FPGAs Q Huang, R Lian, A Canis, J Choi, R Xi, S Brown, J Anderson 2013 IEEE 21st Annual International Symposium on Field-Programmable Custom …, 2013 | 53 | 2013 |
| Synetgy: Algorithm-hardware co-design for convnet accelerators on embedded fpgas Y Yang, Q Huang, B Wu, T Zhang, L Ma, G Gambardella, M Blott, ... Proceedings of the 2019 ACM/SIGDA International Symposium on Field …, 2019 | 48 | 2019 |
| The effect of compiler optimizations on high-level synthesis-generated hardware Q Huang, R Lian, A Canis, J Choi, R Xi, N Calagar, S Brown, J Anderson ACM Transactions on Reconfigurable Technology and Systems (TRETS) 8 (3), 1-26, 2015 | 39 | 2015 |
| AutoPhase: Juggling HLS Phase Orderings in Random Forests with Deep Reinforcement Learning Q Huang, A Haj-Ali, W Moses, J Xiang, I Stoica, K Asanovic, J Wawrzynek arXiv preprint arXiv:2003.00671, 2020 | 15* | 2020 |
| Integrating NVIDIA deep learning accelerator (NVDLA) with RISC-V SoC on FireSim F Farshchi, Q Huang, H Yun 2019 2nd Workshop on Energy Efficient Machine Learning and Cognitive …, 2019 | 13 | 2019 |
| Autockt: Deep reinforcement learning of analog circuit designs K Settaluri, A Haj-Ali, Q Huang, K Hakhamaneshi, B Nikolic 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE), 490-495, 2020 | 10 | 2020 |
| FPGA accelerated INDEL realignment in the cloud L Wu, D Bruns-Smith, FA Nothaft, Q Huang, S Karandikar, J Le, A Lin, ... 2019 IEEE International Symposium on High Performance Computer Architecture …, 2019 | 9 | 2019 |
| CoDeNet: Efficient Deployment of Input-Adaptive Object Detection on Embedded FPGAs Q Huang, D Wang, Z Dong, Y Gao, Y Cai, T Li, B Wu, K Keutzer, ... The 2021 ACM/SIGDA International Symposium on Field-Programmable Gate Arrays …, 2021 | 3* | 2021 |
| Protuner: tuning programs with monte carlo tree search A Haj-Ali, H Genc, Q Huang, W Moses, J Wawrzynek, K Asanović, I Stoica arXiv preprint arXiv:2005.13685, 2020 | 3 | 2020 |
| Centrifuge: Evaluating full-system HLS-generated heterogeneous-accelerator SoCs using FPGA-Acceleration Q Huang, C Yarp, S Karandikar, N Pemberton, B Brock, L Ma, G Dai, ... | 3 | 2019 |
| HAWQV3: Dyadic Neural Network Quantization Z Yao, Z Dong, Z Zheng, A Gholami, J Yu, E Tan, L Wang, Q Huang, ... arXiv preprint arXiv:2011.10680, 2020 | 1 | 2020 |
| BRU: Bandwidth Regulation Unit for Real-Time Multicore Processors F Farshchi, Q Huang, H Yun 2020 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS …, 2020 | 1 | 2020 |
| Synthesis of program binaries into FPGA accelerators with runtime dependence validation S Cheng, Q Huang, J Wawrzynek 2017 International Conference on Field Programmable Technology (ICFPT), 96-103, 2017 | | 2017 |
| Twitter Language Specifier on Spark with GPU J Jia, Q Huang, Q Pu | | |
| Garp—A reconfigurable coprocessor for RISC-V Q Huang, S Roberts | | |
