Ahmed Hemani
Cited by
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A network on chip architecture and design methodology
S Kumar, A Jantsch, JP Soininen, M Forsell, M Millberg, J Oberg, ...
Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms …, 2002
Network on chip: An architecture for billion transistor era
A Hemani, A Jantsch, S Kumar, A Postula, J Oberg, M Millberg, ...
Proceeding of the IEEE NorChip Conference 31 (20), 0, 2000
Lowering power consumption in clock by using globally asynchronous locally synchronous design style
A Hemani, T Meincke, S Kumar, A Postula, T Olsson, P Nilsson, J Oberg, ...
Proceedings of the 36th annual ACM/IEEE Design Automation Conference, 873-878, 1999
Hardware/software partitioning and minimizing memory interface traffic
A Jantsch, P Ellervee, A Hemani, J Öberg, H Tenhunen
European Design Automation Conference: Proceedings of the conference on …, 1994
A case study on hardware/software partitioning
A Jantsch, P Ellervee, J Oberg, A Hemani
Proceedings of IEEE Workshop on FPGA's for Custom Computing Machines, 111-118, 1994
Grammar-based hardware synthesis of data communication protocols
J Oberg, A Kumar, A Hemani
Proceedings of 9th International Symposium on Systems Synthesis, 14-19, 1996
Globally asynchronous locally synchronous architecture for large high-performance ASICs
T Meincke, A Hemani, S Kumar, P Ellervee, J Oberg, T Olsson, P Nilsson, ...
1999 IEEE International Symposium on Circuits and Systems (ISCAS) 2, 512-515, 1999
Cell placement by self-organisation
A Hemani, A Postula
Neural Networks 3 (4), 377-383, 1990
Dynamically Reconfigurable Resource Array
AH M A Shami
PhD Thesis, 2012
The Dark Side of Silicon
AM Rahmani, P Liljeberg, A Hemani, A Jantsch, H Tenhunen
Switzerland: Springer, 2016
Energy-aware coarse-grained reconfigurable architectures using dynamically reconfigurable isolation cells
SMAH Jafri, O Bag, A Hemani, N Farahini, K Paul, J Plosila, H Tenhunen
International Symposium on Quality Electronic Design (ISQED), 104-111, 2013
Addressing dynamic issues in information security management
H Abbas, C Magnusson, L Yngstrom, A Hemani
Information Management & Computer Security 19 (1), 5-24, 2011
Partially reconfigurable interconnection network for dynamically reprogrammable resource array
MA Shami, A Hemani
2009 IEEE 8th International Conference on ASIC, 122-125, 2009
Energy-aware-task-parallelism for efficient dynamic voltage, and frequency scaling, in cgras
SMAH Jafri, MA Tajammul, A Hemani, K Paul, J Plosila, H Tenhunen
2013 International Conference on Embedded Computer Systems: Architectures …, 2013
39.9 GOPs/watt multi-mode CGRA accelerator for a multi-standard basestation
N Farahini, S Li, MA Tajammul, MA Shami, G Chen, A Hemani, W Ye
2013 IEEE International Symposium on Circuits and Systems (ISCAS), 1448-1451, 2013
Distributed DVFS using rationally-related frequencies and discrete voltage levels
JM Chabloz, A Hemani
Proceedings of the 16th ACM/IEEE international symposium on Low power …, 2010
System level synthesis of hardware for DSP applications using pre-characterized function implementations
S Li, N Farahini, A Hemani, K Rosvall, I Sander
2013 International Conference on Hardware/Software Codesign and System …, 2013
Morphable dpu: Smart and efficient data path for signal processing applications
MA Shami, A Hemani
2009 IEEE Workshop on Signal Processing Systems, 167-172, 2009
Charting the EDA roadmap
A Hemani
IEEE Circuits and Devices Magazine 20 (6), 5-10, 2004
A perspective on dark silicon
A Kanduri, AM Rahmani, P Liljeberg, A Hemani, A Jantsch, H Tenhunen
The Dark Side of Silicon: Energy Efficient Computing in the Dark Silicon Era …, 2017
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