| Hardware Trojan Detection in Behavioral Intellectual Properties (IPs) Using Property Checking Techniques N Veeranna, BC Schafer IEEE Transactions on Emerging Topics in Computing 5 (4), 576-585, 2017 | 35 | 2017 |
| Efficient behavioral intellectual properties source code obfuscation for high-level synthesis N Veeranna, BC Schafer 2017 18th IEEE Latin American Test Symposium (LATS), 1-6, 2017 | 16 | 2017 |
| S3CBench: Synthesizable security systemC benchmarks for high-level synthesis N Veeranna, BC Schafer Journal of Hardware and Systems Security 1, 103-113, 2017 | 12 | 2017 |
| Trust filter: Runtime hardware Trojan detection in behavioral MPSoCs N Veeranna, BC Schafer Journal of Hardware and Systems Security 1, 56-67, 2017 | 7 | 2017 |
| On time redundancy of fault tolerant C-based MPSoCs A Balachandran, N Veeranna, BC Schafer 2016 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 631-636, 2016 | 6 | 2016 |
| Cidpro: Custom instructions for dynamic program diversification TH Pham, A Fell, AK Biswas, SK Lam, N Veeranna 2018 28th International Conference on Field Programmable Logic and …, 2018 | 4 | 2018 |
| Hardware trojan avoidance and detection for dynamically re-configurable FPGAs N Veeranna, BC Schafer 2016 International Conference on Field-Programmable Technology (FPT), 193-196, 2016 | 4 | 2016 |
| Computer program code obfuscation methods and systems SK Lam, HT Pham, A Fell, V Nandeesha US Patent 11,392,672, 2022 | | 2022 |
| Source Code Obfuscation of Behavioral IPs: Challenges and Solutions N Veeranna, BC Schafer Behavioral Synthesis for Hardware Security, 43-56, 2021 | | 2021 |
| Design for trust in behavioral VLSI design N Veeranna Hong Kong Polytechnic University, 2017 | | 2017 |
Benjamin Carrion SchaferAssociate Professor of Electrical and Computer Engineering, The University of Texas at DallasVerified email at utdallas.edu
