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Liuyang ZHANG
Liuyang ZHANG
PengCheng Laboratory
Verified email at pcl.ac.cn - Homepage
Title
Cited by
Cited by
Year
Reconfigurable codesign of STT-MRAM under process variations in deeply scaled technology
W Kang, L Zhang, JO Klein, Y Zhang, D Ravelosona, W Zhao
IEEE Transactions on Electron Devices 62 (6), 1769-1777, 2015
1772015
Yield and reliability improvement techniques for emerging nonvolatile STT-MRAM
W Kang, L Zhang, W Zhao, JO Klein, Y Zhang, D Ravelosona, C Chappert
IEEE Journal on Emerging and Selected Topics in Circuits and Systems 5 (1 …, 2014
792014
Addressing the Thermal Issues of STT-MRAM from Compact Modeling to Design Techniques
L Zhang, Y Cheng, W Kang, L Torres, Y Zhang, A Todri-Sanial, W Zhao
IEEE Transactions on Nanotechnology, 2018
432018
A high-reliability and low-power computing-in-memory implementation within STT-MRAM
L Zhang, E Deng, H Cai, Y Wang, L Torres, A Todri-Sanial, Y Zhang
Microelectronics Journal 81, 69-75, 2018
172018
Quantitative Evaluation of Reliability and Performance for STT-MRAM
L Zhang, A Todri-Sanial, W Kang, Y Zhang, L Torres, Y Cheng, W Zhao
IEEE International Symposium on Circuits and Systems 2016, 1150-1153, 2016
172016
Reliability and performance evaluation for STT-MRAM under temperature variation
L Zhang, Y Cheng, W Kang, Y Zhang, W Zhao, LTA Todri-Sanial
IEEE International Conference on Thermal, Mechanical and Multi-Physics …, 2016
162016
Variability study of MWCNT local interconnects considering defects and contact resistances—Part I: Pristine MWCNT
R Chen, J Liang, J Lee, VP Georgiev, R Ramos, H Okuno, D Kalita, ...
IEEE Transactions on Electron Devices 65 (11), 4955-4962, 2018
142018
Variability study of MWCNT local interconnects considering defects and contact resistances—Part II: Impact of charge transfer doping
R Chen, J Liang, J Lee, VP Georgiev, R Ramos, H Okuno, D Kalita, ...
IEEE Transactions on Electron Devices 65 (11), 4963-4970, 2018
82018
A robust dual reference computing-in-memory implementation and design space exploration within STT-MRAM
L Zhang, W Kang, H Cai, P Ouyang, L Torres, Y Zhang, A Todri-Sanial, ...
2018 IEEE Computer Society Annual Symposium on VLSI (ISVLSI), 275-280, 2018
72018
Research on RFID anti-collision algorithm of slot responding in real-time and co-processing
XH Zhang, LY Zhang
Acta Electronica Sinica 42 (6), 1139-1146, 2014
72014
Physical description and analysis of doped carbon nanotube interconnects
J Liang, L Zhang, N Azemard-Crestani, P Nouet, A Todri-Sanial
2016 26th International Workshop on Power and Timing Modeling, Optimization …, 2016
62016
Research on passive RFID system adaptive frame slot anti-collision algorithm
Z Xiaohong, Z Liuyang
Journal of Electronics 44 (9), 2211-2218, 2016
52016
High-density, low-power voltage-control spin orbit torque memory with synchronous two-step write and symmetric read techniques
H Wang, W Kang, L Zhang, H Zhang, BK Kaushik, W Zhao
2020 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2020
42020
Channel modeling and reliability enhancement design techniques for STT-MRAM
L Zhang, W Kang, Y Zhang, Y Cheng, L Zeng, JO Klein, W Zhao
2015 IEEE Computer Society Annual Symposium on VLSI, 461-466, 2015
42015
A Fully Integrated Fast Transient Dual-Loop Digital LDO Based on Adaptive Clock Frequency for Voltage Regulation Applications
X Duan, Y Wang, L Zhang, J Liang
2022 IEEE 16th International Conference on Solid-State & Integrated Circuit …, 2022
12022
A Fast Transient Response Capacitorless LDO with Slew Rate Enhancement Design
YZ Wang, X Duan, L Zhang, J Liang
2022 IEEE 16th International Conference on Solid-State & Integrated Circuit …, 2022
12022
处理器微架构
张留洋
开源RISC-V处理器架构分析与验证, 1-288, 2024
2024
An Automatic Offset Compensation Sense Amplifier Featuring High Readout Reliability for SRAM
S Li, J Liang, L Zhang
2023 20th International SoC Design Conference (ISOCC), 23-24, 2023
2023
An Analog Assisted Dual Loop Hybrid LDO Based on Adaptive Clock
X Duan, Y Wang, P Huang, K Sun, L Zhang, J Liang
2023 IEEE 15th International Conference on ASIC (ASICON), 1-4, 2023
2023
A Bandgap Voltage Reference with Low Temperature Coefficient and High PSRR Designed for LDO
Y Wang, X Duan, K Sun, P Huang, L Zhang, J Liang
2023 IEEE 15th International Conference on ASIC (ASICON), 1-4, 2023
2023
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