Akash Kumar
Akash Kumar
Full Professor of Processor Design, Computer Science, Technische Universität Dresden
Verified email at tu-dresden.de - Homepage
Title
Cited by
Cited by
Year
Mapping on multi/many-core systems: survey of current and emerging trends.
AK Singh, M Shafique, A Kumar, J Henkel
Proceedings of the 50th Annual Design Automation Conference, 2013
4242013
Communication-aware heuristics for run-time task mapping on noc-based mpsoc platforms
AK Singh, T Srikanthan, A Kumar, W Jigang
Journal of Systems Architecture 56 (7), 242-255, 2010
1472010
An FPGA design flow for reconfigurable network-based multi-processor systems on chip
A Kumar, A Hansson, J Huisken, H Corporaal
2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007
1002007
Architectural-space exploration of approximate multipliers
S Rehman, W El-Harouni, M Shafique, A Kumar, J Henkel, J Henkel
2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2016
952016
High-Throughput and Low-Power Architectures for Reed Solomon Decoder
A Kumar, S Sawitzki
a. kumar at tue. nl, Eindhoven University of Technology and sergei. sawitzki …, 2005
912005
Reinforcement learning-based inter-and intra-application thermal optimization for lifetime improvement of multicore systems
A Das, RA Shafik, GV Merrett, BM Al-Hashimi, A Kumar, B Veeravalli
Proceedings of the 51st Annual Design Automation Conference, 1-6, 2014
862014
Multiprocessor systems synthesis for multiple use-cases of multiple applications on FPGA
A Kumar, S Fernando, Y Ha, B Mesman, H Corporaal
ACM Transactions on Design Automation of Electronic Systems (TODAES) 13 (3 …, 2008
842008
Accelerating throughput-aware runtime mapping for heterogeneous MPSoCs
AK Singh, A Kumar, T Srikanthan
ACM Transactions on Design Automation of Electronic Systems (TODAES) 18 (1 …, 2013
782013
Reliability-driven task mapping for lifetime extension of networks-on-chip based multiprocessor systems
A Das, A Kumar, B Veeravalli
2013 Design, Automation & Test in Europe Conference & Exhibition (DATE), 689-694, 2013
772013
Adaptive and transparent cache bypassing for GPUs
A Li, GJ van den Braak, A Kumar, H Corporaal
Proceedings of the International Conference for High Performance Computing …, 2015
692015
Project-based learning in embedded systems education using an FPGA platform
A Kumar, S Fernando, RC Panicker
IEEE transactions on education 56 (4), 407-415, 2013
682013
Combined DVFS and mapping exploration for lifetime and soft-error susceptibility improvement in MPSoCs
A Das, A Kumar, B Veeravalli, C Bolchini, A Miele
2014 Design, Automation & Test in Europe Conference & Exhibition (DATE), 1-6, 2014
632014
A low active leakage and high reliability phase change memory (PCM) based non-volatile FPGA storage element
K Huang, Y Ha, R Zhao, A Kumar, Y Lian
IEEE Transactions on Circuits and Systems I: Regular Papers 61 (9), 2605-2613, 2014
622014
Energy optimization by exploiting execution slacks in streaming applications on multiprocessor systems
AK Singh, A Das, A Kumar
Proceedings of the 50th annual design automation conference, 1-7, 2013
492013
A hybrid strategy for mapping multiple throughput-constrained applications on MPSoCs
AK Singh, A Kumar, T Srikanthan
2011 Proceedings of the 14th International Conference on Compilers …, 2011
482011
Locality-aware cta clustering for modern gpus
A Li, SL Song, W Liu, X Liu, A Kumar, H Corporaal
ACM SIGARCH Computer Architecture News 45 (1), 297-311, 2017
472017
CA-MPSoC: An automated design flow for predictable multi-processor architectures for multiple applications
A Shabbir, A Kumar, S Stuijk, B Mesman, H Corporaal
Journal of Systems Architecture 56 (7), 265-277, 2010
432010
Membrane systems and distributed computing
G Ciobanu, R Desai, A Kumar
Membrane Computing, 187-202, 2003
412003
Reliability and energy-aware mapping and scheduling of multimedia applications on multiprocessor systems
A Das, A Kumar, B Veeravalli
IEEE Transactions on Parallel and Distributed Systems 27 (3), 869-884, 2015
392015
Run-time mapping for reliable many-cores based on energy/performance trade-offs
C Bolchini, M Carminati, A Miele, A Das, A Kumar, B Veeravalli
2013 IEEE International Symposium on Defect and Fault Tolerance in VLSI and …, 2013
392013
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