Vikram Suresh
Vikram Suresh
Research Scientist, Intel Labs
Verifierad e-postadress på ecs.umass.edu
Titel
Citeras av
Citeras av
År
340mV-1.1 V, 289Gbps/W, 2090-gate NanoAES Hardware Accelerator with Area-optimized Encrypt/Decrypt GF (2 4) 2 Polynomials in 22nm tri-gate CMOS
S Mathew, S Satpathy, V Suresh, H Kaul, M Anders, G Chen, A Agarwal, ...
IEEE Symposium on VLSI Circuits, 2014
1172014
μRNG: A 300-950mV 323Gbps/W all-digital full-entropy TRNG in 14nm FinFET CMOS
S Mathew
IEEE Proc. of the ESSCIRC, 116-119, 2015
62*2015
RNG: A 300–950 mV, 323 Gbps/W All-Digital Full-Entropy True Random Number Generator in 14 nm FinFET CMOS
SK Mathew, D Johnston, S Satpathy, V Suresh, P Newman, MA Anders, ...
IEEE Journal of Solid-State Circuits 51 (7), 1695-1704, 2016
542016
A 4-fJ/b Delay-Hardened Physically Unclonable Function Circuit With Selective Bit Destabilization in 14-nm Trigate CMOS
S Satpathy, SK Mathew, V Suresh, MA Anders, H Kaul, A Agarwal, ...
IEEE Journal of Solid-State Circuits 52 (4), 940-949, 2017
482017
Entropy extraction in metastability-based TRNG
VB Suresh, WP Burleson
Hardware-Oriented Security and Trust (HOST), 2010 IEEE International …, 2010
362010
On-chip lightweight implementation of reduced NIST randomness test suite
VB Suresh, D Antonioli, WP Burleson
2013 IEEE International Symposium on Hardware-Oriented Security and Trust …, 2013
272013
Entropy and Energy Bounds for Metastability Based TRNG with Lightweight Post-Processing
VB Suresh, WP Burleson
IEEE Transactions on Circuits and Systems I: Regular Papers 62 (7), 1785-1793, 2015
252015
Implementing hardware trojans: Experiences from a hardware trojan challenge
GT Becker, A Lakshminarasimhan, L Lin, S Srivathsa, VB Suresh, ...
2011 IEEE 29th International Conference on Computer Design (ICCD), 301-304, 2011
242011
An All-Digital Unified Physically Unclonable Function and True Random Number Generator Featuring Self-Calibrating Hierarchical Von Neumann Extraction in 14-nm Tri-gate CMOS
SK Satpathy, SK Mathew, R Kumar, V Suresh, MA Anders, H Kaul, ...
IEEE Journal of Solid-State Circuits 54 (4), 1074-1085, 2019
182019
Memory access control system and method
R Schreiber, V Suresh
US Patent US 9013949 B2, 2013
142013
2.9 TOPS/W Reconfigurable Dense/Sparse Matrix-Multiply Accelerator with Unified INT8/INTI6/FP16 Datapath in 14NM Tri-Gate CMOS
M Anders, H Kaul, S Mathew, V Suresh, S Satpathy, A Agarwal, S Hsu, ...
2018 IEEE Symposium on VLSI Circuits, 39-40, 2018
132018
Optimized SHA-256 datapath for energy-efficient high-performance Bitcoin mining
VB Suresh, SK Satpathy, SK Mathew
US Patent 10,142,098, 2018
122018
Ultra-low energy security circuits for IoT applications
S Satpathy, S Mathew, V Suresh, R Krishnamurthy
2016 IEEE 34th International Conference on Computer Design (ICCD), 682-685, 2016
122016
Robust metastability-based TRNG design in nanometer CMOS with sub-vdd pre-charge and hybrid self-calibration
VB Suresh, WP Burleson
Thirteenth International Symposium on Quality Electronic Design (ISQED), 298-305, 2012
122012
Lithography aware critical area estimation and yield analysis
P Vijayakumar, VB Suresh, S Kundu
2011 IEEE International Test Conference, 1-8, 2011
112011
Hardware apparatuses and methods for data decompression
SK Satpathy, JD Guilford, SK Mathew, V Gopal, VB Suresh
US Patent App. 14/757,854, 2019
102019
Hardware apparatuses and methods for data decompression
SK Satpathy, JD Guilford, SK Mathew, V Gopal, VB Suresh
US Patent 10,177,782, 2019
102019
On-chip True Random Number Generation in Nanometer CMOS
VB Suresh
102012
An All-Digital Unified Static/Dynamic Entropy Generator Featuring Self-Calibrating Hierarchical Von Neumann Extraction for Secure Privacy-Preserving Mutual Authentication in …
S Satpathy, S Mathew, V Suresh, M Anders, H Kaul, A Agarwal, S Hsu, ...
2018 IEEE Symposium on VLSI Circuits, 169-170, 2018
92018
220MV-900MV 794/584/754 GBPS/W Reconfigurable GF(24)2 AES/SMS4/Camellia Symmetric-Key Cipher Accelerator in 14NM Tri-Gate CMOS
S Satpathy, V Suresh, S Mathew, M Anders, H Kaul, A Agarwal, S Hsu, ...
2018 IEEE Symposium on VLSI Circuits, 175-176, 2018
82018
Systemet kan inte utföra åtgärden just nu. Försök igen senare.
Artiklar 1–20