| A 28nm 29.2 tflops/w bf16 and 36.5 tops/w int8 reconfigurable digital cim processor with unified fp/int pipeline and bitwise in-memory booth multiplication for cloud deep … F Tu, Y Wang, Z Wu, L Liang, Y Ding, B Kim, L Liu, S Wei, Y Xie, S Yin 2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 1-3, 2022 | 62 | 2022 |
| A 28nm 15.59 µJ/token full-digital bitline-transpose CIM-based sparse transformer accelerator with pipeline/parallel reconfigurable modes F Tu, Z Wu, Y Wang, L Liang, L Liu, Y Ding, L Liu, S Wei, Y Xie, S Yin 2022 IEEE International Solid-State Circuits Conference (ISSCC) 65, 466-468, 2022 | 34 | 2022 |
| TIMAQ: A time-domain computing-in-memory-based processor using predictable decomposed convolution for arbitrary quantized DNNs J Yang, Y Kong, Z Zhang, Z Liu, J Zhou, Y Wang, Y Liu, C Guo, T Hu, C Li, ... IEEE Journal of Solid-State Circuits 56 (10), 3021-3038, 2021 | 15 | 2021 |
| ReDCIM: Reconfigurable digital computing-in-memory processor with unified FP/INT pipeline for cloud AI acceleration F Tu, Y Wang, Z Wu, L Liang, Y Ding, B Kim, L Liu, S Wei, Y Xie, S Yin IEEE Journal of Solid-State Circuits 58 (1), 243-255, 2022 | 13 | 2022 |
| SDP: Co-designing algorithm, dataflow, and architecture for in-SRAM sparse NN acceleration F Tu, Y Wang, L Liang, Y Ding, L Liu, S Wei, S Yin, Y Xie IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2022 | 12 | 2022 |
| 16.1 MuITCIM: A 28nm /Token Attention-Token-Bit Hybrid Sparse Digital CIM-Based Accelerator for Multimodal Transformers F Tu, Z Wu, Y Wang, W Wu, L Liu, Y Hu, S Wei, S Yin 2023 IEEE International Solid-State Circuits Conference (ISSCC), 248-250, 2023 | 11 | 2023 |
| 16.4 TensorCIM: A 28nm 3.7 nJ/gather and 8.3 TFLOPS/W FP32 digital-CIM tensor processor for MCM-CIM-based beyond-NN acceleration F Tu, Y Wang, Z Wu, W Wu, L Liu, Y Hu, S Wei, S Yin 2023 IEEE International Solid-State Circuits Conference (ISSCC), 254-256, 2023 | 8 | 2023 |
| TranCIM: Full-digital bitline-transpose CIM-based sparse transformer accelerator with pipeline/parallel reconfigurable modes F Tu, Z Wu, Y Wang, L Liang, L Liu, Y Ding, L Liu, S Wei, Y Xie, S Yin IEEE Journal of Solid-State Circuits, 2022 | 7 | 2022 |
| SPCIM: Sparsity-Balanced Practical CIM Accelerator With Optimized Spatial-Temporal Multi-Macro Utilization Y Wang, F Tu, L Liu, S Wei, Y Xie, S Yin IEEE Transactions on Circuits and Systems I: Regular Papers 70 (1), 214-227, 2022 | 5 | 2022 |
| GQNA: Generic quantized DNN accelerator with weight-repetition-aware activation aggregating J Yang, F Tu, Y Li, Y Wang, L Liu, S Wei, S Yin IEEE Transactions on Circuits and Systems I: Regular Papers 69 (10), 4069-4082, 2022 | 5 | 2022 |
| A time-domain computing-in-memory based processor using predictable decomposed convolution for arbitrary quantized DNNs J Yang, Y Kong, Z Zhang, Z Liu, J Zhou, Y Wang, Y Liu, C Guo, T Hu, C Li, ... 2020 IEEE Asian Solid-State Circuits Conference (A-SSCC), 1-4, 2020 | 4 | 2020 |
| MulTCIM: Digital Computing-in-Memory-Based Multimodal Transformer Accelerator With Attention-Token-Bit Hybrid Sparsity F Tu, Z Wu, Y Wang, W Wu, L Liu, Y Hu, S Wei, S Yin IEEE Journal of Solid-State Circuits, 2023 | 2 | 2023 |
| OmniCIM: A Sparsity-Aware Computing-in-Memory based Processor for Accelerating Arbitrary Quantized Neural Networks J Yang, Y Kong, Y Wang, Z Zhang, J Zhou, Z Liu, Y Liu, C Guo, T Hu, C Li, L ... HotChips 2020, 2020 | | 2020 |
Shouyi YinTsinghua UniversityVerifierad e-postadress på tsinghua.edu.cn
