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sarvesh prabhu
sarvesh prabhu
virginia tech
Verifierad e-postadress på intel.com
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A SMT-based diagnostic test generation method for combinational circuits
S Prabhu, MS Hsiao, L Lingappan, V Gangaram
2012 IEEE 30th VLSI Test Symposium (VTS), 215-220, 2012
282012
Information-theoretic and statistical methods of failure log selection for improved diagnosis
S Tanwir, S Prabhu, M Hsiao, L Lingappan
2015 IEEE International Test Conference (ITC), 1-10, 2015
262015
A novel SMT-based technique for LFSR reseeding
S Prabhu, MS Hsiao, L Lingappan, V Gangaram
2012 25th International Conference on VLSI Design, 394-399, 2012
92012
An Efficient 2-Phase Strategy to Achieve High Branch Coverage
SP Prabhu
Virginia Tech, 2012
62012
An efficient 2-phase strategy to achieve high branch coverage
S Prabhu, MS Hsiao, S Krishnamoorthy, L Lingappan, V Gangaram, ...
2011 Asian Test Symposium, 167-174, 2011
62011
A diagnosis-friendly LBIST architecture with property checking
S Prabhu, VV Acharya, S Bagri, MS Hsiao
2014 International Test Conference, 1-9, 2014
52014
Techniques for Enhancing Test and Diagnosis of Digital Circuits
SP Prabhu
Virginia Tech, 2015
32015
Test generation for circuits with embedded memories using SMT
S Prabhu, MS Hsiao, L Lingappan, V Gangaram
2013 18th IEEE European Test Symposium (ETS), 1-1, 2013
32013
Property-checking based LBIST for improved diagnosability
S Prabhu, VV Acharya, S Bagri, MS Hsiao
2014 19th IEEE European Test Symposium (ETS), 1-2, 2014
22014
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Artiklar 1–9