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Li Xiangwei
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DeCO: A DSP block based FPGA accelerator overlay with low overhead interconnect
AK Jain, X Li, P Singhai, DL Maskell, SA Fahmy
2016 IEEE 24th Annual International Symposium on Field-Programmable Custom …, 2016
402016
Adapting the DySER architecture with DSP blocks as an Overlay for the Xilinx Zynq
AK Jain, X Li, SA Fahmy, DL Maskell
ACM SIGARCH Computer Architecture News 43 (4), 28-33, 2016
332016
Time-multiplexed FPGA overlay architectures: A survey
X Li, DL Maskell
ACM Transactions on Design Automation of Electronic Systems (TODAES) 24 (5 …, 2019
252019
An area-efficient FPGA overlay using DSP block based time-multiplexed functional units
X Li, A Jain, D Maskell, SA Fahmy
arXiv preprint arXiv:1606.06460, 2016
162016
A time-multiplexed FPGA overlay with linear interconnect
X Li, AK Jain, DL Maskell, SA Fahmy
2018 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2018
142018
High throughput accelerator interface framework for a linear time-multiplexed fpga overlay
X Li, K Vipin, DL Maskell, SA Fahmy, AK Jain
2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020
52020
FPGA overlays: hardware-based computing for the masses
X Li, CF Phung, DL Maskell
Proceedings of the Eighth International Conference on Advances in Computing …, 2018
52018
A scalable systolic accelerator for estimation of the spectral correlation density function and its FPGA implementation
X Li, DL Maskell, CJ Li, PHW Leong, D Boland
ACM Transactions on Reconfigurable Technology and Systems 16 (1), 1-24, 2022
22022
Fixed-Point FPGA Implementation of the FFT Accumulation Method for Real-time Cyclostationary Analysis
CJ LI, X LI, B LOU, CT JIN, D BOLAND, PHW LEONG
ACM Transactions on Reconfigurable Technology and Systems (TRETS), 2022
12022
Time-Multiplexed FPGA overlays with linear interconnect
X Li
Doctoral thesis, Nanyang Technological University, Singapore, 2018
2018
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