Homa Aghilinasab
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An efficient dvs scheme for on-chip networks using reconfigurable virtual channel allocators
M Sadrosadati, A Mirhosseini, H Aghilinasab, H Sarbazi-Azad
2015 IEEE/ACM International Symposium on Low Power Electronics and Design …, 2015
Reducing power consumption of GPGPUs through instruction reordering
H Aghilinasab, M Sadrosadati, MH Samavatian, H Sarbazi-Azad
Proceedings of the 2016 international symposium on low power electronics and …, 2016
Appendix to: Dynamic Memory Bandwidth Allocation For Real-Time GPU-Based SOC Platforms
H Aghilinasab, W Ali, H Yun, R Pellizzoni
Dynamic Memory Bandwidth Allocation for Real-Time GPU-Based SoC Platforms
H Aghilinasab, W Ali, H Yun, R Pellizzoni
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020
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