| Improved CMOS (4; 2) compressor designs for parallel multipliers A Pishvaie, G Jaberipur, A Jahanian Computers & Electrical Engineering 38 (6), 1703-1716, 2012 | 56 | 2012 |
| High-performance CMOS (4: 2) compressors A Pishvaie, G Jaberipur, A Jahanian International journal of electronics 101 (11), 1511-1525, 2014 | 35 | 2014 |
| Redesigned CMOS (4; 2) compressor for fast binary multipliers A Pishvaie, G Jaberipur, A Jahanian Canadian Journal of Electrical and Computer Engineering 36 (3), 111-115, 2013 | 26 | 2013 |
| Design Hybrid Logical Gates With Current and Voltage Output A Pishvaie, K Navi, M Haghparast 12th International CSI Computer Conference (CSICC), Persian, 911-915, 2007 | 2 | 2007 |
| RAFT A Pishvaie, G Jaberipur, A Jahanian Can. J. Elect. Comput. Eng 36 (3), 2013 | | 2013 |
