Följ
Lars Bengtsson
Lars Bengtsson
Department of Computer Science and Engineering, Chalmers University of Technology, Gothenburg
Verifierad e-postadress på chalmers.se
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An energy and identification time decreasing procedure for memoryless RFID tag anticollision protocols
H Landaluce, A Perallos, E Onieva, L Arjona, L Bengtsson
IEEE Transactions on Wireless Communications 15 (6), 4234-4247, 2016
732016
Parameterizable architecture-level SRAM power model using circuit-simulation backend for leakage calibration
MQ Do, M Drazdziulis, P Larsson-Edefors, L Bengtsson
7th International Symposium on Quality Electronic Design (ISQED'06), 7 pp.-563, 2006
402006
Protocols for active rfid-the energy consumption aspect
B Nilsson, L Bengtsson, PA Wiberg, B Svensson
2007 International Symposium on Industrial Embedded Systems, 41-48, 2007
282007
Forward and reverse converters and moduli set selection in signed-digit residue number systems
A Persson, L Bengtsson
Journal of Signal Processing Systems 56, 1-15, 2009
242009
Jalapeno: decentralized grid computing using peer-to-peer technology
N Therning, L Bengtsson
Proceedings of the 2nd conference on Computing frontiers, 59-65, 2005
242005
A globally asynchronous, locally synchronous SIMD processor
L Bengtsson, B Svensson
3rd Intl. Conf. on Massively Parallel Computing Systems, 1998
241998
Arithmetic circuits combining residue and signed-digit representations
A Lindström, M Nordseth, L Bengtsson, A Omondi
Advances in Computer Systems Architecture: 8th Asia-Pacific Conference …, 2003
232003
Simplified computation in memoryless anti‐collision RFID identification protocols
H Landaluce, A Perallos, L Bengtsson, IJ Garcia Zuazola
Electronics Letters 50 (17), 1250-1252, 2014
192014
A low-power FIR filter using combined residue and radix-2 signed-digit representation
A Lindahl, L Bengtsson
8th Euromicro Conference on Digital System Design (DSD'05), 42-47, 2005
182005
REMAP massively parallel computer platform for neural computations
L Bengtsson, A Linde, B Svensson, M Taveniku, A Åhlander
Third International Conference on Microelectronics for Neural Networks …, 1997
171997
An application dependent medium access protocol for active RFID using dynamic tuning of the back-off algorithm
B Nilsson, L Bengtsson, B Svensson
2009 IEEE International Conference on RFID, 72-79, 2009
152009
Leakage-conscious architecture-level power estimation for partitioned and power-gated sram arrays
MQ Do, M Drazdziulis, P Larsson-Edefors, L Bengtsson
8th International Symposium on Quality Electronic Design (ISQED'07), 185-191, 2007
142007
Grid Computing Distribution using Network Processors.
B Liljeqvist, L Bengtsson
IASTED PDCS, 12-17, 2002
142002
Theory of a room-temperature silicon quantum dot device as a sensitive electrometer
JK Vincent, V Narayan, H Pettersson, M Willander, K Jeppson, ...
Journal of applied physics 95 (1), 323-326, 2004
112004
A high-performance embedded massively parallel processing system
L Bengtsson, K Nilsson, B Svensson
Proceedings of the First International Conference on Massively Parallel …, 1994
111994
A low power-long range active RFID-system consisting of active RFID backscatter transponders
E Nilsson, B Nilsson, L Bengtsson, B Svensson, PA Wiberg, U Bilstrup
2010 IEEE International Conference on RFID-Technology and Applications, 26-30, 2010
102010
Towards an energy efficient protocol for active rfid
B Nilsson, L Bengtsson, U Bilstrup, PA Wiberg, B Svensson
2006 International Symposium on Industrial Embedded Systems, 1-4, 2006
92006
An active backscatter wake-up and tag identification extraction protocol for low cost and low power active RFID
B Nilsson, L Bengtsson, B Svensson, U Bilstrup, PA Wiberg
2010 IEEE International Conference on RFID-Technology and Applications, 86-91, 2010
82010
Selecting back off algorithm in active RFID CSMA/CA based medium-access protocols
B Nilsson, L Bengtsson, B Svensson
2008 International Symposium on Industrial Embedded Systems, 265-270, 2008
62008
The REMAP reconfigurable architecture: A retrospective
L Bengtsson, A Linde, T Nordstrom, B Svensson, M Taveniku
FPGA Implementations of Neural Networks, 325-360, 2006
62006
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Artiklar 1–20