Chateda: A large language model powered autonomous agent for eda H Wu, Z He, X Zhang, X Yao, S Zheng, H Zheng, B Yu IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2024 | 24 | 2024 |
AlphaSyn: Logic synthesis optimization with efficient monte carlo tree search Z Pei, F Liu, Z He, G Chen, H Zheng, K Zhu, B Yu 2023 IEEE/ACM International Conference on Computer Aided Design (ICCAD), 1-9, 2023 | 3 | 2023 |
A high-performance accelerator for super-resolution processing on embedded GPU W Zhao, Y Bai, Q Sun, W Li, H Zheng, N Jiang, J Lu, B Yu, MDF Wong IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2023 | 3 | 2023 |
GTuner: Tuning DNN computations on GPU via graph attention network Q Sun, X Zhang, H Geng, Y Zhao, Y Bai, H Zheng, B Yu Proceedings of the 59th ACM/IEEE Design Automation Conference, 1045-1050, 2022 | 3 | 2022 |
OpenDRC: An Efficient Open-Source Design Rule Checking Engine with Hierarchical GPU Acceleration Z He, Y Zuo, J Jiang, H Zheng, Y Ma, B Yu 2023 60th ACM/IEEE Design Automation Conference (DAC), 1-6, 2023 | 2 | 2023 |
Parameter-Efficient Sparsity Crafting from Dense to Mixture-of-Experts for Instruction Tuning on General Tasks H Wu, H Zheng, B Yu arXiv preprint arXiv:2401.02731, 2024 | 1 | 2024 |
CBTune: Contextual Bandit Tuning for Logic Synthesis F Liu, Z Pei, Z Yu, H Zheng, Z He, T Chen, B Yu | | 2024 |
IncreMacro: Incremental Macro Placement Refinement Y Pu, T Chen, Z He, C Bai, H Zheng, Y Lin, B Yu Proceedings of the 2024 International Symposium on Physical Design, 169-176, 2024 | | 2024 |
LSTP: A Logic Synthesis Timing Predictor H Zheng, Z He, F Liu, Z Pei, B Yu | | 2024 |