Microgrid protection: A comprehensive review A Dagar, P Gupta, V Niranjan Renewable and Sustainable Energy Reviews, 2021 | 142 | 2021 |
TurtleBot: Design and Hardware Component Selection D Singh, E Trivedi, Y Sharma, V Niranjan IEEE International Conference On Computing, Power And Communication Technologies, 2018 | 27 | 2018 |
Composite Transistor Cell Using Dynamic Body Bias for High Gain and Low-Voltage Applications V Niranjan, A Kumar, SB Jain Journal of Circuits, Systems, and Computers 23 (8), 2014 | 22 | 2014 |
Triple well subthreshold CMOS logic using body-bias technique V Niranjan, A Kumar, SB Jain IEEE International Conference on Signal Processing, Computing and Control, 1-6, 2013 | 22 | 2013 |
Maximum Bandwidth Enhancement of current mirror using series-resistor and dynamic body bias technique V Niranjan, A Kumar, SB Jain Radioengineering. 23 (3), 922-930, 2014 | 21 | 2014 |
Smart Density Based Traffic Light System A Firdous, Indu, V Niranjan IEEE 8th International Conference On Reliability, Infocom Technologies And …, 2020 | 20 | 2020 |
Low Power Filter Design using Memristor, Meminductor and Memcapacitor A Arora, V Niranjan The IEEE Conference on Electrical, Computer and Electronics (UPCON) 26-28 …, 2017 | 17 | 2017 |
Efficient FIR filter design using Booth Multiplier for VLSI applications S Nagaria, A Singh, V Niranjan IEEE International Conference On Computing, Power And Communication Technologies, 2018 | 16 | 2018 |
Low power and high performance ring counter using pulsed latch technique T Doi, V Niranjan IEEE International Conference on Micro-Electronics and Telecommunication …, 2016 | 16 | 2016 |
An Analytical model of the Bulk-DTMOS transistor V Niranjan, M Gupta Journal of Electron Devices 8 (2010), 329-338, 2010 | 16 | 2010 |
Dynamic Threshold MOS transistor for Low Voltage Analog Circuits V Niranjan, A Singh, A Kumar International Conference on Recent Trends & Issues in Engineering and …, 2014 | 15 | 2014 |
High Performance Wallace Tree Multiplier Using Improved Adder M Janveja, V Niranjan Journal on Microelectronics 3 (1), 370-374, 2017 | 13 | 2017 |
Performance Evaluation of Subthreshold Schmitt Trigger Using Body Bias Techniques M Janveja, A Khan, V Niranjan IEEE International Conference On Computational Techniques In Information And …, 2016 | 12 | 2016 |
Performance evaluation of low voltage Schmitt triggers using variable Threshold techniques JS Joseph, R Shukla, V Niranjan 2015 4th International Conference on Reliability, Infocom Technologies and …, 2015 | 12 | 2015 |
Low-voltage and High-speed Flipped Voltage Follower Using DTMOS transistor V Niranjan, A Kumar, SB Jain IEEE International Conference on Signal Propagation and Computer technology …, 2014 | 11 | 2014 |
Low voltage flipped voltage follower based current mirror using DTMOS technique V Niranjan, A Kumar, SB Jain IMPACT-2013, 250-254, 2013 | 11 | 2013 |
Body biasing-a circuit level approach to reduce leakage in low power CMOS circuits V Niranjan, M Gupta Journal of Active and Passive Electronic Devices 6 (1-2), 89-99, 2011 | 11 | 2011 |
An efficient elite group-based routing protocol for wireless sensor network R Shukla, A Kumar, V Niranjan International Journal of Electronics 107 (7), 1031-1043, 2020 | 10 | 2020 |
A new 16-bit high speed and variable stage carry skip adder A Arora, V Niranjan IEEE International Conference on Computational Intelligence & Communication …, 2017 | 10 | 2017 |
Low voltage four‐quadrant analog multiplier using dynamic threshold MOS transistors V Niranjan, M Gupta Microelectronics international 26 (1), 47-52, 2009 | 9 | 2009 |