Follow
JOSE E FRANCA
Title
Cited by
Cited by
Year
Design of analog-digital VLSI circuits for telecommunications and signal processing
JE Franca, Y Tsividis
Prentice-Hall, Inc., 1994
1321994
A CMOS humidity sensor with on-chip calibration
YY Qiu, C Azeredo-Leme, LR Alcacer, JE Franca
Sensors and Actuators A: Physical 92 (1-3), 80-87, 2001
1132001
Systematic design for optimization of high-speed self-calibrated pipelined A/D converters
J Goes, JC Vital, JE Franca
IEEE transactions on circuits and systems II: Analog and digital signal …, 1998
941998
Nonrecursive polyphase switched-capacitor decimators and interpolators
J da Franca
IEEE transactions on Circuits and Systems 32 (9), 877-887, 1985
871985
CAD tools for data converter design: An overview
GGE Gielen, JE Franca
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 1996
661996
Correction of frequency-dependent I/Q mismatches in quadrature receivers
KP Pun, JE Franca, C Azeredo-Leme, CF Chan, CS Choy
Electronics Letters 37 (23), 1, 2001
572001
Multirate analog-digital systems for signal processing and conversion
J Franca, A Petraglia, SK Mitra
Proceedings of the IEEE 85 (2), 242-262, 1997
541997
Analogue-digital ASICS: circuit techniques, design tools and applications
RS Soin, F Maloberti, J Franca
IET, 1991
511991
Introduction to analog VLSI design automation
M Ismail, JE Franca
Springer Science & Business Media, 2012
462012
Wideband digital correction of I and Q mismatch in quadrature radio receivers
KP Pun, JE Franca, C Azeredo-Leme
2000 IEEE International Symposium on Circuits and Systems (ISCAS) 5, 661-664, 2000
462000
Systematic design for optimisation of pipelined ADCs
J Goes, JC Vital, JE Franca
Springer Science & Business Media, 2006
442006
Oscillation test methodology for a digitally-programmable switched-current biquad
PM Dias, JE Franca, N Paulino
Proc. IEEE Int’l Mixed Signal Testing Workshop, Quebec City, 221-226, 1996
391996
Design and applications of single-path frequency-translated switched-capacitor systems
JE Da Franca, DG Haigh
IEEE transactions on circuits and systems 35 (4), 394-408, 1988
351988
FIR switched-capacitor decimators with active-delayed block polyphase structures
JE Franca, S Santos
IEEE transactions on circuits and systems 35 (8), 1033-1037, 1988
341988
Quadrature sampling schemes with improved image rejection
KP Pun, JE da Franca, C Azeredo-Leme, R Reis
IEEE Transactions on Circuits and Systems II: Analog and Digital Signal …, 2003
322003
Digital frequency tuning technique based on current division for integrated active RC filters
KP Pun, CS Choy, CF Chan, JE Da Franca
Electronics Letters 39 (19), 1366-1367, 2003
312003
Circuit design for wireless communications: improved techniques for image rejection in wideband quadrature receivers
KP Pun, JE Da Franca, C Azeredo-Leme
Springer Science & Business Media, 2013
292013
New CMOS logarithmic A/D converters employing pipeline and algorithmic architectures
J Guilherme, JE Franca
Proceedings of ISCAS'95-International Symposium on Circuits and Systems 1 …, 1995
281995
An optimum CMOS switched-capacitor antialiasing decimating filter
RP Martins, JE Franca, F Maloberti
IEEE Journal of Solid-State Circuits 28 (9), 962-970, 1993
281993
Algorithm-driven synthesis of data conversion architectures
NC Horta, JE Franca
IEEE transactions on computer-aided design of integrated circuits and …, 1997
271997
The system can't perform the operation now. Try again later.
Articles 1–20