| A phase-interpolator-based fractional counter for all-digital fractional-N phase-locked loop YH Choi, B Kim, JY Sim, HJ Park IEEE Transactions on Circuits and Systems II: Express Briefs 64 (3), 249-253, 2016 | 16 | 2016 |
| A 2-Gb/s intrapanel interface for TFT-LCD with a VSYNC-embedded subpixel clock and a cascaded deskew and multiphase DLL HJ Chi, YH Choi, SM Lee, JY Sim, HJ Park, JJ Lim, PS Kang, BY Lee, ... IEEE Transactions on Circuits and Systems II: Express Briefs 58 (10), 687-691, 2011 | 11 | 2011 |
| Enhance OS security by restricting privileges of vulnerable application H Shukla, V Singh, YH Choi, JO Kwon, C Hahm 2013 IEEE 2nd Global Conference on Consumer Electronics (GCCE), 207-211, 2013 | 10 | 2013 |
| A fractional-N frequency divider for SSCG using a single dual-modulus integer divider and a phase interpolator YH Choi, JY Sim, HJ Park 2012 International SoC Design Conference (ISOCC), 68-71, 2012 | 10 | 2012 |
| Low-dose spiral CT: application to three-dimensional imaging of central airways Y Choi, HP McAdams, SC Jeon, C Park, S Lee, C Hahm Radiology 217 (suppl), 385, 2000 | 5 | 2000 |
| Work-in-progress: Lightweight deadlock detection technique for embedded systems via OS-level analysis Y Choi, J Kwon, S Jeong, H Park, YI Eom 2018 International Conference on Embedded Software (EMSOFT), 1-2, 2018 | 4 | 2018 |
| Managing swap area in memory using multiple compression algorithms S Jusun, J Jeong, J Jihun, C Changhyeon, K Jaeook, S Jeong, ... US Patent 11,467,734, 2022 | 3 | 2022 |
| All-synthesizable 6Gbps voltage-mode transmitter for serial link YH Choi, K Seong, B Kim, JY Sim, HJ Park 2016 IEEE Asian Solid-State Circuits Conference (A-SSCC), 245-248, 2016 | 3 | 2016 |
| Optimizing memory swapping scheme on the memory debugging platform of CE devices Y Choi, DH Kang, J Kwon, YI Eonf 2018 IEEE International Conference on Consumer Electronics (ICCE), 1-3, 2018 | 2 | 2018 |
| 6.3: A Low‐EMI 2Gbps ClockAlignedtoData IntraPanel Interface (CADI) for TFT‐LCD with the VSYNC‐Embedded Clock and Equalization HJ Chi, YH Choi, SM Lee, JY Sim, HJ Park, J Lim, PS Kang, BY Lee, ... SID Symposium Digest of Technical Papers 41 (1), 62-65, 2010 | 2 | 2010 |
| Electronic apparatus and controlling method for performing memory swapping to reduce resource usage C Youngho, YI Eom, K Jaeook US Patent 11,409,648, 2022 | 1 | 2022 |
| An efficient device to device RPC framework using DBUS and KDBus JK Singh, AP Asthana, LM Tripathi, J Song, Y Choi, JO Kwon, C Hahm 2016 International Conference on Electronics, Information, and …, 2016 | 1 | 2016 |
| Device and method for operating memory in electronic device J Jihun, J Kyeonghwan, C Changhyeon, K Jaeook, S Jusun, J Jeong, ... US Patent App. 18/190,350, 2023 | | 2023 |
| Electronic apparatus and control method thereof S Jusun, J Kyeonghwan, J Jeong, J Jihun, C Changhyeon, C Youngho, ... US Patent App. 18/302,700, 2023 | | 2023 |
| Electronic apparatus and control method thereof C Changhyeon, S Jusun, J Jeong, J Jihun, K Jaeook, S Jeong, ... US Patent 11,726,821, 2023 | | 2023 |
| Electronic apparatus for controlling availability of memory for processes loading data into the memory and control method thereof C Changhyeon, S Jusun, J Jeong, J Jihun, K Jaeook, S Jeong, ... US Patent 11,385,932, 2022 | | 2022 |
| An Efficient Stack Management by The Selective Revocation of Mapping from Virtual Memory to Physical memory J Song, Y Choi, S Jeong, C Hahm 2020 IEEE International Conference on Consumer Electronics-Asia (ICCE-Asia), 1-3, 2020 | | 2020 |
| A spread spectrum clock generator using phase/frequency boosting with a peak power reduction 14.9 dB, RMS jitter 1.40 ps and power 4.8 mW/GHz for USB 3.0 SH Jeon, YH Choi, BS Kim, JY Sim, HJ Park 2012 IEEE Asian Solid State Circuits Conference (A-SSCC), 285-288, 2012 | | 2012 |
