Xiaoqing Xu
Xiaoqing Xu
Verifierad e-postadress på arm.com
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Methodology for standard cell compliance and detailed placement for triple patterning lithography
B Yu, X Xu, JR Gao, Y Lin, Z Li, CJ Alpert, DZ Pan
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015
742015
Self-aligned double patterning aware pin access and standard cell layout co-optimization
X Xu, B Cline, G Yeric, B Yu, DZ Pan
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2015
712015
PARR: Pin access planning and regular routing for self-aligned double patterning
X Xu, B Yu, JR Gao, CL Hsu, DZ Pan
Proceedings of the 52nd Annual Design Automation Conference, 28, 2015
602015
Computer implemented system and method for generating a layout of a cell defining a circuit component
P De Dood, MW Frederick, JC Wang, BDN Lee, BT Cline, X Xu, AW Chen, ...
US Patent 10,083,269, 2018
522018
MrDP: Multiple-row detailed placement of heterogeneous-sized cells for advanced nodes
Y Lin, B Yu, X Xu, JR Gao, N Viswanathan, WH Liu, Z Li, CJ Alpert, ...
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017
492017
MOSAIC: Mask optimizing solution with process window aware inverse correction
JR Gao, X Xu, B Yu, DZ Pan
2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2014
462014
Design for manufacturability and reliability in extreme-scaling VLSI
B Yu, X Xu, S Roy, Y Lin, J Ou, DZ Pan
Science China Information Sciences 59 (6), 1-23, 2016
372016
New insights into AC RTN in scaled high-к/metal-gate MOSFETs under digital circuit operations
J Zou, R Wang, N Gong, R Huang, X Xu, J Ou, C Liu, J Wang, J Liu, J Wu, ...
2012 Symposium on VLSI Technology (VLSIT), 139-140, 2012
342012
Pushing multiple patterning in sub-10nm: Are we ready?
DZ Pan, L Liebmann, B Yu, X Xu, Y Lin
2015 52nd ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2015
292015
A machine learning based framework for sub-resolution assist feature generation
X Xu, T Matsunawa, S Nojima, C Kodama, T Kotani, DZ Pan
Proceedings of the 2016 on International Symposium on Physical Design, 161-168, 2016
272016
Standard cell library design and optimization methodology for ASAP7 PDK
X Xu, N Shah, A Evans, S Sinha, B Cline, G Yeric
2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 999 …, 2017
252017
Towards the systematic study of aging induced dynamic variability in nano-MOSFETs: Adding the missing cycle-to-cycle variation effects into device-to-device variation
C Liu, J Zou, R Wang, R Huang, X Xu, J Liu, H Wu, Y Wang
2011 International Electron Devices Meeting, 25.4. 1-25.4. 4, 2011
202011
A practical split manufacturing framework for trojan prevention via simultaneous wire lifting and cell insertion
M Li, B Yu, Y Lin, X Xu, W Li, DZ Pan
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2018
172018
Subresolution assist feature generation with supervised data learning
X Xu, Y Lin, M Li, T Matsunawa, S Nojima, C Kodama, T Kotani, DZ Pan
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2017
162017
Hierarchical and analytical placement techniques for high-performance analog circuits
B Xu, S Li, X Xu, N Sun, DZ Pan
Proceedings of the 2017 ACM on International Symposium on Physical Design, 55-62, 2017
142017
Concurrent pin access optimization for unidirectional routing
X Xu, Y Lin, V Livramento, DZ Pan
2017 54th ACM/EDAC/IEEE Design Automation Conference (DAC), 1-6, 2017
132017
Machine learning for mask/wafer hotspot detection and mask synthesis
Y Lin, X Xu, J Ou, DZ Pan
Photomask Technology 2017 10451, 104510A, 2017
122017
DSAR: DSA aware routing with simultaneous DSA guiding pattern and double patterning assignment
J Ou, B Yu, X Xu, J Mitra, Y Lin, DZ Pan
Proceedings of the 2017 ACM on International Symposium on Physical Design, 91-98, 2017
122017
Adding the missing time-dependent layout dependency into device-circuit-layout co-optimization-New findings on the layout dependent aging effects
P Ren, X Xu, P Hao, J Wang, R Wang, M Li, J Wang, W Bu, J Wu, W Wong, ...
2015 IEEE International Electron Devices Meeting (IEDM), 11.7. 1-11.7. 4, 2015
122015
Systematic framework for evaluating standard cell middle-of-line robustness for multiple patterning lithography
B Cline, X Xu, GM Yeric, B Yu, DZ Pan
Journal of Micro/Nanolithography, MEMS, and MOEMS 15 (2), 021202, 2016
112016
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