Visualization of VHDL-based simulations as a pedagogical tool for supporting computer science education GR Garay, A Tchernykh, AY Drozdov, SN Garichev, S Nesmachnow, ... Journal of Computational Science 36, 100652, 2019 | 16 | 2019 |
System performance evaluation by combining RTC and VHDL simulation: A case study on NICs GR Garay, J Ortega, AF Diaz, L Corrales, V Alarcon-Aquino Journal of Systems Architecture 59 (10), 1277-1298, 2013 | 11 | 2013 |
Comparing real-time calculus with the existing analytical approaches for the performance evaluation of network interfaces GR Garay, J Ortega, V Alarcón-Aquino CONIELECOMP 2011, 21st International Conference on Electrical Communications …, 2011 | 9 | 2011 |
An approach for the performance evaluation of multi-tier cloud applications GR Garay, A Tchernykh, A Drozdov 2015 International Conference on Engineering and Telecommunication (EnT), 63-66, 2015 | 4 | 2015 |
Comparing simulation alternatives for high-level abstraction modeling of nic's buffer requirements in a network node GR Garay, M León, R Aguilar, V Alarcón 2010 IEEE Electronics, Robotics and Automotive Mechanics Conference, 68-73, 2010 | 4 | 2010 |
A survey of analytical modeling of network interfaces in the era of the 10 Gigabit Ethernet GRG Alvarez 2009 6th International Conference on Electrical Engineering, Computing …, 2009 | 2 | 2009 |
A VHDL-Based modeling of network interface card buffers: design and teaching methodology GR Garay, A Tchernykh, AY Drozdov, SV Novikov, VE Vladislavlev High Performance Computer Applications: 6th International Conference, ISUM …, 2016 | 1 | 2016 |
Comparative analysis of frameworks for the performance evaluation of multi-tier cloud applications GR Garay, A Tchernykh, AY Drozdov Труды Института системного программирования РАН 27 (6), 199-224, 2015 | | 2015 |
A VHDL-based modelling of NIC buffers GR Garay, J Ortega, AF Díaz, A Tchernykh | | |