Andrew S. Cassidy
Andrew S. Cassidy
Research Staff Member, IBM Research
Verified email at us.ibm.com - Homepage
Title
Cited by
Cited by
Year
A million spiking-neuron integrated circuit with a scalable communication network and interface
PA Merolla, JV Arthur, R Alvarez-Icaza, AS Cassidy, J Sawada, ...
Science 345 (6197), 668-673, 2014
23992014
Convolutional networks for fast, energy-efficient neuromorphic computing
SK Esser, PA Merolla, JV Arthur, AS Cassidy, R Appuswamy, ...
Proceedings of the national academy of sciences 113 (41), 11441-11446, 2016
704*2016
Truenorth: Design and tool flow of a 65 mw 1 million neuron programmable neurosynaptic chip
F Akopyan, J Sawada, A Cassidy, R Alvarez-Icaza, J Arthur, P Merolla, ...
IEEE transactions on computer-aided design of integrated circuits and …, 2015
6062015
Cognitive computing building block: A versatile and efficient digital neuron model for neurosynaptic cores
AS Cassidy, P Merolla, JV Arthur, SK Esser, B Jackson, R Alvarez-Icaza, ...
The 2013 International Joint Conference on Neural Networks (IJCNN), 1-10, 2013
2582013
Cognitive computing systems: Algorithms and applications for networks of neurosynaptic cores
SK Esser, A Andreopoulos, R Appuswamy, P Datta, D Barch, A Amir, ...
The 2013 International Joint Conference on Neural Networks (IJCNN), 1-10, 2013
1762013
Building block of a programmable neuromorphic substrate: A digital neurosynaptic core
JV Arthur, PA Merolla, F Akopyan, R Alvarez, A Cassidy, S Chandra, ...
the 2012 international joint conference on Neural networks (IJCNN), 1-8, 2012
1692012
Cognitive computing programming paradigm: a corelet language for composing networks of neurosynaptic cores
A Amir, P Datta, WP Risk, AS Cassidy, JA Kusnitz, SK Esser, ...
The 2013 International Joint Conference on Neural Networks (IJCNN), 1-10, 2013
1512013
Conversion of artificial recurrent neural networks to spiking neural networks for low-power neuromorphic hardware
PU Diehl, G Zarrella, A Cassidy, BU Pedroni, E Neftci
2016 IEEE International Conference on Rebooting Computing (ICRC), 1-8, 2016
1112016
Design of silicon brains in the nano-CMOS era: Spiking neurons, learning synapses and neural architecture optimization
AS Cassidy, J Georgiou, AG Andreou
Neural Networks 45, 4-26, 2013
992013
Design of a one million neuron single FPGA neuromorphic system for real-time multimodal scene analysis
A Cassidy, AG Andreou, J Georgiou
2011 45Th annual conference on information sciences and systems, 1-6, 2011
822011
Real-time scalable cortical computing at 46 giga-synaptic OPS/watt with~ 100× speedup in time-to-solution and~ 100,000× reduction in energy-to-solution
AS Cassidy, R Alvarez-Icaza, F Akopyan, J Sawada, JV Arthur, ...
SC'14: Proceedings of the International Conference for High Performance …, 2014
752014
Beyond Amdahl's law: An objective function that links multiprocessor performance gains to delay and energy
AS Cassidy, AG Andreou
IEEE Transactions on Computers 61 (8), 1110-1126, 2011
672011
Dynamical digital silicon neurons
A Cassidy, AG Andreou
2008 IEEE Biomedical Circuits and Systems Conference, 289-292, 2008
672008
FPGA based silicon spiking neural array
A Cassidy, S Denham, P Kanold, A Andreou
2007 IEEE Biomedical Circuits and Systems Conference, 75-78, 2007
652007
Truenorth ecosystem for brain-inspired computing: scalable systems, software, and applications
J Sawada, F Akopyan, AS Cassidy, B Taba, MV Debole, P Datta, ...
SC'16: Proceedings of the International Conference for High Performance …, 2016
592016
A high-level analytical model for application specific CMP design exploration
A Cassidy, K Yu, H Zhou, AG Andreou
2011 Design, Automation & Test in Europe, 1-6, 2011
582011
Truehappiness: Neuromorphic emotion recognition on truenorth
PU Diehl, BU Pedroni, A Cassidy, P Merolla, E Neftci, G Zarrella
2016 International Joint Conference on Neural Networks (IJCNN), 4278-4285, 2016
532016
High-level modeling and simulation of single-chip programmable heterogeneous multiprocessors
JM Paul, DE Thomas, AS Cassidy
ACM Transactions on Design Automation of Electronic Systems (TODAES) 10 (3 …, 2005
512005
A switched capacitor implementation of the generalized linear integrate-and-fire neuron
F Folowosele, A Harrison, A Cassidy, AG Andreou, R Etienne-Cummings, ...
2009 IEEE International Symposium on Circuits and Systems (ISCAS), 2149-2152, 2009
482009
Consolidating multiple neurosynaptic cores into one memory
RAI Rivera, JV Arthur, AS Cassidy, PA Merolla, DS Modha
US Patent 8,990,130, 2015
422015
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