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Abhishek A Sinkar
Abhishek A Sinkar
PhD, University of Wisconsin Madison
Verified email at uwalumni.com
Title
Cited by
Cited by
Year
Energysmart: Toward energy-efficient manycores for near-threshold computing
UR Karpuzcu, A Sinkar, NS Kim, J Torrellas
2013 IEEE 19th International Symposium on High Performance Computer …, 2013
942013
Combating aging with the colt duty cycle equalizer
E Gunadi, AA Sinkar, NS Kim, MH Lipasti
2010 43rd Annual IEEE/ACM International Symposium on Microarchitecture, 103-114, 2010
742010
Low-cost per-core voltage domain support for power-constrained high-performance processors
AA Sinkar, HR Ghasemi, MJ Schulte, UR Karpuzcu, NS Kim
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 22 (4), 747-758, 2013
422013
Cost-effective power delivery to support per-core voltage domains for power-constrained processors
HR Ghasemi, AA Sinkar, MJ Schulte, NS Kim
Proceedings of the 49th Annual Design Automation Conference, 56-61, 2012
362012
Workload-aware voltage regulator optimization for power efficient multi-core processors
AA Sinkar, H Wang, NS Kim
2012 Design, Automation & Test in Europe Conference & Exhibition (DATE …, 2012
242012
Analyzing and minimizing effects of temperature variation and NBTI on active leakage power of power-gated circuits
A Sinkar, NS Kim
2010 11th International Symposium on Quality Electronic Design (ISQED), 791-796, 2010
152010
Frequency and yield optimization using power gates in power-constrained designs
NS Kim, J Seomun, A Sinkar, J Lee, TH Han, K Choi, Y Shin
Proceedings of the 2009 ACM/IEEE international symposium on Low power …, 2009
142009
Novel integrable 80V silicon lateral trench power MOSFETs for high frequency DC-DC converters
KR Varadarajan, A Sinkar, TP Chow
2007 IEEE Power Electronics Specialists Conference, 1013-1017, 2007
122007
False path aware timing yield estimation under variability
L Xie, A Davoodi, KK Saluja, A Sinkar
2009 27th IEEE VLSI Test Symposium, 161-166, 2009
112009
WOR-BIST: A complete test solution for designs meeting power, area and performance requirements
C Yao, KK Saluja, AA Sinkar
2009 22nd International Conference on VLSI Design, 479-484, 2009
112009
A circuit simulation model of a novel silicon lateral trench power MOSFET for high frequency switching applications
KR Varadarajan, A Sinkar, TP Chow
2006 IEEE Workshops on Computers in Power Electronics, 306-309, 2006
102006
Analyzing potential power reduction with adaptive voltage positioning optimized for multicore processors
A Sinkar, NS Kim
Proceedings of the 2009 ACM/IEEE international symposium on Low power …, 2009
92009
Improving platform energy-chip area trade-off in near-threshold computing environment
H Wang, AA Sinkar, NS Kim
2013 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 318-325, 2013
72013
Maximizing throughput of power/thermal-constrained processors by balancing power consumption of cores
AA Sinkar, H Wang, NS Kim
Fifteenth International Symposium on Quality Electronic Design, 633-638, 2014
62014
VR-scale: Runtime dynamic phase scaling of processor voltage regulators for improving power efficiency
H Asghari-Moghaddam, HR Ghasemi, AA Sinkar, I Paul, NS Kim
Proceedings of the 53rd Annual Design Automation Conference, 1-6, 2016
52016
K. choi, and Y
NS Kim, J Seomun, A Sinkar, J Lee, TH Han
Shin,“Frequency and yield optimization using power gates in power …, 2009
52009
Comparison of integrated current sensing circuits and implementation for smart control of synchronous rectifiers
A Sinkar, RJ Gutmann, TP Chow, J Sun
Proceedings of 2005 CPES Annual Seminar, 301-304, 2005
52005
A comparative study of master-slave control and virtual synchronous machine control for parallel VSC-HVDC links feeding passive loads on offshore platforms
C Jiang, AD Sinkar, MK Das, AM Gole, V Pathirana
15th IET International Conference on AC and DC Power Transmission (ACDC 2019 …, 2019
32019
Clamping virtual supply voltage of power-gated circuits for active leakage reduction and gate-oxide reliability
A Sinkar, T Park, NS Kim
IEEE transactions on very large scale integration (VLSI) systems 21 (3), 580-584, 2012
22012
An analog circuit approach for optimal damping of inter-area oscillations using wide area control of power converters
P Agnihotri, AM Kulkarni, AM Gole, A Sinkar
2019 IEEE Canadian Conference of Electrical and Computer Engineering (CCECE …, 2019
12019
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