Victor Lee
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Debunking the 100X GPU vs. CPU myth: an evaluation of throughput computing on CPU and GPU
VW Lee, C Kim, J Chhugani, M Deisher, D Kim, AD Nguyen, N Satish, ...
Proceedings of the 37th annual international symposium on Computer …, 2010
10382010
Baring it all to software: Raw machines
E Waingold, M Taylor, D Srikrishna, V Sarkar, W Lee, V Lee, J Kim, ...
Computer 30 (9), 86-93, 1997
9441997
Sort vs. Hash revisited: fast join implementation on modern multi-core CPUs
C Kim, T Kaldewey, VW Lee, E Sedlar, AD Nguyen, N Satish, J Chhugani, ...
Proceedings of the VLDB Endowment 2 (2), 1378-1389, 2009
3352009
FAST: fast architecture sensitive tree search on modern CPUs and GPUs
C Kim, J Chhugani, N Satish, E Sedlar, AD Nguyen, T Kaldewey, VW Lee, ...
Proceedings of the 2010 ACM SIGMOD International Conference on Management of …, 2010
3262010
Fast sort on CPUs and GPUs: a case for bandwidth oblivious SIMD sort
N Satish, C Kim, J Chhugani, AD Nguyen, VW Lee, D Kim, P Dubey
Proceedings of the 2010 ACM SIGMOD International Conference on Management of …, 2010
2672010
Efficient implementation of sorting on multi-core SIMD CPU architecture
J Chhugani, AD Nguyen, VW Lee, W Macy, M Hagog, YK Chen, A Baransi, ...
Proceedings of the VLDB Endowment 1 (2), 1313-1324, 2008
2482008
Convergence of recognition, mining, and synthesis workloads and its implications
YK Chen, J Chhugani, P Dubey, CJ Hughes, D Kim, S Kumar, VW Lee, ...
Proceedings of the IEEE 96 (5), 790-807, 2008
1292008
Architecting to achieve a billion requests per second throughput on a single key-value store server platform
S Li, H Lim, VW Lee, JH Ahn, A Kalia, M Kaminsky, DG Andersen, ...
ACM SIGARCH Computer Architecture News 43 (3), 476-488, 2015
1222015
The raw benchmark suite: Computation structures for general purpose computing
J Babb, M Frank, V Lee, E Waingold, R Barua, M Taylor, J Kim, ...
Field-Programmable Custom Computing Machines, 1997. Proceedings., The 5th …, 1997
1161997
Mapping high-fidelity volume rendering for medical imaging to CPU, GPU and many-core architectures
M Smelyanskiy, D Holmes, J Chhugani, A Larson, DM Carmean, ...
IEEE transactions on visualization and computer graphics 15 (6), 2009
1002009
Vector instructions to enable efficient synchronization and parallel reduction operations
M Smelyanskiy, S Kumar, D Kim, J Chhugani, C Kim, CJ Hughes, VW Lee, ...
US Patent 9,513,905, 2016
872016
Vector instructions to enable efficient synchronization and parallel reduction operations
M Smelyanskiy, S Kumar, D Kim, J Chhugani, C Kim, CJ Hughes, VW Lee, ...
US Patent 9,513,905, 2016
872016
Vector instructions to enable efficient synchronization and parallel reduction operations
M Smelyanskiy, S Kumar, D Kim, J Chhugani, C Kim, CJ Hughes, VW Lee, ...
US Patent 9,513,905, 2016
872016
Implications of I/O for gang scheduled workloads
W Lee, M Frank, V Lee, K Mackenzie, L Rudolph
Job Scheduling Strategies for Parallel Processing, 215-237, 1997
871997
Fast sort on cpus, gpus and intel mic architectures
N Satish, C Kim, J Chhugani, AD Nguyen, VW Lee, D Kim, P Dubey
Intel Labs, 77-80, 2010
702010
Lattice qcd on intel® xeon phitm coprocessors
B Joo, DD Kalamkar, K Vaidyanathan, M Smelyanskiy, K Pamnany, ...
International Supercomputing Conference, 40-54, 2013
572013
Lattice qcd on intel® xeon phitm coprocessors
B Joo, DD Kalamkar, K Vaidyanathan, M Smelyanskiy, K Pamnany, ...
International Supercomputing Conference, 40-54, 2013
572013
Lattice qcd on intel® xeon phitm coprocessors
B Joo, DD Kalamkar, K Vaidyanathan, M Smelyanskiy, K Pamnany, ...
International Supercomputing Conference, 40-54, 2013
572013
Scheduling and partitioning tasks via architecture-aware feedback information
A Ozgur, GT Buehrer, AD Nguyen, D Kim, VW Lee, M Smelyanskiy, ...
US Patent App. 11/300,809, 2005
572005
Atomic vector operations on chip multiprocessors
S Kumar, D Kim, M Smelyanskiy, YK Chen, J Chhugani, CJ Hughes, ...
ACM SIGARCH Computer Architecture News 36 (3), 441-452, 2008
512008
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