| At-speed test of high-speed dut using built-off test interface J Park, JW Lee, J Chung, K Han, JA Abraham, E Byun, CJ Woo, S Oh 2010 19th IEEE Asian Test Symposium, 269-274, 2010 | 11 | 2010 |
| Analysis of dynamic voltage drop with PVT variation in FinFET designs Y Ban, C Choi, H Shin, J Lee, Y Kang, W Paik 2014 International SoC design conference (ISOCC), 132-133, 2014 | 9 | 2014 |
| Construction of largest equivalent systems for power system simulator YH Kim, ST Cha, JW Lee, TK Kim, JB Choo, HK Nam European transactions on electrical power 16 (1), 79-91, 2006 | 7 | 2006 |
| A random jitter RMS estimation technique for BIST applications JW Lee, JH Chun, JA Abraham 2009 Asian Test Symposium, 9-14, 2009 | 6 | 2009 |
| A novel characterization technique for high speed I/O mixed signal circuit components using random jitter injection JH Chun, JW Lee, JA Abraham 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), 312-317, 2010 | 4 | 2010 |
| Low-Complexity Off-Chip Skew Measurement and Compensation Module (SMCM) Design for Built-Off Test Chip K Han, J Park, JW Lee, JA Abraham, E Byun, CJ Woo, S Oh 2009 14th IEEE European Test Symposium, 129-134, 2009 | 3 | 2009 |
| An analytical approach to thermal design and optimization with a temperature-dependent power model S Shim, JW Lee, Y Shin IEEE Transactions on Circuits and Systems I: Regular Papers 62 (3), 816-824, 2015 | 2 | 2015 |
| Off-chip skew measurement and compensation module (SMCM) design for built-off test chip K Han, J Park, JW Lee, J Chung, E Byun, CJ Woo, S Oh, JA Abraham Journal of Electronic Testing 27, 429-439, 2011 | 2 | 2011 |
| Development of wide area monitoring system using GPS JB Choo, KH Kim, DH Jeon, JW Lee, IK Lee, SH Yoon IFAC Proceedings Volumes 36 (20), 735-738, 2003 | 2 | 2003 |
| Indirect method for random jitter measurement on SoCs using critical path characterization JW Lee, JH Chun, JA Abraham 2012 17th IEEE European Test Symposium (ETS), 1-6, 2012 | 1 | 2012 |
| A delay measurement method using a shrinking clock signal JW Lee, JH Chun, JA Abraham Proceedings of the 20th symposium on Great lakes symposium on VLSI, 139-142, 2010 | 1 | 2010 |
| Test of phase interpolators in high speed I/Os using a sliding window search JH Chun, SM Lim, SC Ong, JW Lee, JA Abraham 2012 IEEE 30th VLSI Test Symposium (VTS), 134-139, 2012 | | 2012 |
