Martin Kumm
Martin Kumm
Fulda University of Applied Sciences
Verified email at cs.hs-fulda.de - Homepage
Title
Cited by
Cited by
Year
An FPGA-based linear all-digital phase-locked loop
M Kumm, H Klingbeil, P Zipf
IEEE Transactions on Circuits and Systems I: Regular Papers 57 (9), 2487-2497, 2010
802010
Pipelined adder graph optimization for high speed multiple constant multiplication
M Kumm, P Zipf, M Faust, CH Chang
2012 IEEE International Symposium on Circuits and Systems (ISCAS), 49-52, 2012
522012
CORDIC II: a new improved CORDIC algorithm
M Garrido, P Källström, M Kumm, O Gustafsson
IEEE Transactions on Circuits and Systems II: Express Briefs 63 (2), 186-190, 2015
482015
A digital beam-phase control system for heavy-ion synchrotrons
H Klingbeil, B Zipfel, M Kumm, P Moritz
IEEE Transactions on Nuclear Science 54 (6), 2604-2610, 2007
442007
Pipelined compressor tree optimization using integer linear programming
M Kumm, P Zipf
2014 24th International Conference on Field Programmable Logic and …, 2014
382014
Dynamically reconfigurable FIR filter architectures with fast reconfiguration
M Kumm, K Möller, P Zipf
2013 8th International Workshop on Reconfigurable and Communication-Centric …, 2013
382013
Optimization of high speed pipelining in FPGA-based FIR filter design using genetic algorithm
U Meyer-Baese, G Botella, DET Romero, M Kumm
Independent Component Analyses, Compressive Sampling, Wavelets, Neural Net …, 2012
362012
Multiple constant multiplication with ternary adders
M Kumm, M Hardieck, J Willkomm, P Zipf, U Meyer-Baese
2013 23rd International Conference on Field programmable Logic and …, 2013
282013
High speed low complexity FPGA-based FIR filters using pipelined adder graphs
M Kumm, P Zipf
2011 International Conference on Field-Programmable Technology, 1-4, 2011
282011
Efficient High Speed Compression Trees on Xilinx FPGAs.
M Kumm, P Zipf
MBMV, 171-182, 2014
262014
Reconfigurable FIR filter using distributed arithmetic on FPGAs
M Kumm, K Möller, P Zipf
2013 IEEE International Symposium on Circuits and Systems (ISCAS), 2058-2061, 2013
252013
An efficient softcore multiplier architecture for Xilinx FPGAs
M Kumm, S Abbas, P Zipf
2015 IEEE 22nd Symposium on Computer Arithmetic, 18-25, 2015
222015
Digital Hilbert transformers for FPGA-based phase-locked loops
M Kumm, MS Sanjari
2008 International Conference on Field Programmable Logic and Applications …, 2008
222008
Optimal single constant multiplication using ternary adders
M Kumm, O Gustafsson, M Garrido, P Zipf
IEEE Transactions on Circuits and Systems II: Express Briefs 65 (7), 928-932, 2016
162016
Implementation of realtime and highspeed phase detector on FPGA
A Guntoro, P Zipf, O Soffke, H Klingbeil, M Kumm, M Glesner
International Workshop on Applied Reconfigurable Computing, 1-11, 2006
162006
Optimization of constant matrix multiplication with low power and high throughput
M Kumm, M Hardieck, P Zipf
IEEE Transactions on Computers 66 (12), 2072-2080, 2017
152017
Multiple constant multiplication optimizations for field programmable gate arrays
M Kumm, P Zipf
Springer Fachmedien Wiesbaden, 2016
132016
Advanced compressor tree synthesis for FPGAs
M Kumm, J Kappauf
IEEE Transactions on Computers 67 (8), 1078-1091, 2018
122018
FIR filter optimization for video processing on FPGAs
M Kumm, D Fanghänel, K Möller, P Zipf, U Meyer-Baese
EURASIP Journal on Advances in Signal Processing 2013 (1), 1-18, 2013
112013
Efficient sum of absolute difference computation on FPGAs
M Kumm, M Kleinlein, P Zipf
2016 26th International Conference on Field Programmable Logic and …, 2016
102016
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