| Design of a DC—DC converter for a PV array S Hariharan, VN Kumar 2010 International Conference on Industrial Electronics, Control and …, 2010 | 11 | 2010 |
| Data hiding scheme for medical images using lossless code for mobile HIMS VN Kumar, M Rochan, S Hariharan, K Rajamani 2011 Third International Conference on Communication Systems and Networks …, 2011 | 10 | 2011 |
| Scaling of split-gate flash memory with 1.05 V select transistor for 28 nm embedded flash technology N Do, JW Yang, YJ Sheng, CS Su, MT Wu, H Ouyang, H Liang, ... 2018 IEEE International Memory Workshop (IMW), 1-3, 2018 | 9 | 2018 |
| A 55 nm logic-process-compatible, split-gate flash memory array fully demonstrated at automotive temperature with high access speed and reliability N Do, L Tee, S Hariharan, S Lemke, M Tadayoni, W Yang, MT Wu, J Kim, ... 2015 IEEE International Memory Workshop (IMW), 1-3, 2015 | 7 | 2015 |
| A novel integrated instrumentation technique for air pollution monitoring S Hariharan 2010 International Conference on Environmental Engineering and Applications …, 2010 | 7 | 2010 |
| High Precision And Highly Efficient Tuning Mechanisms And Algorithms For Analog Neuromorphic Memory In Artificial Neural Networks SH Hieu Van Tran, Vipin Tiwari, Nhan Do, Steven Lemke, Santosh Hariharan US Patent 10,748,630, 2019 | 6 | 2019 |
| Method of Forming Resistive Random Access Memory (RRAM) Cells ND Feng Zhou, Xian Liu, Steven Lemke, Santosh Hariharan, Hieu Van Tran US Patent App. 15/727,776, 2018 | 5* | 2018 |
| SPICE modeling of 55 nm embedded SuperFlash® technology 2T memory cells S Martinie, O Rozeau, M Tadayoni, C Raynaud, E Nowak, S Hariharan, ... Proceedings of the 2015 International Conference on Microelectronic Test …, 2015 | 3 | 2015 |
| A RELIABLE ANTI-COUNTERFIETING TECHNIQUE USING LOSSLESS CODE S HARIHARAN, V NAVEEN KUMAR IPCV 2010: proceedings of the 2010 international conference on image …, 2010 | 3 | 2010 |
| Modeling split-gate flash memory cell for advanced neuromorphic computing M Tadayoni, S Hariharan, S Lemke, T Pate-Cazal, B Bertello, V Tiwari, ... 2018 IEEE International Conference on Microelectronic Test Structures (ICMTS …, 2018 | 2 | 2018 |
| Challenges of Modeling the Split-Gate SuperFlash® Memory Cell with 1.1 V Select Transistor M Tadayoni, S Martinie, O Rozeau, S Hariharan, C Raynaud, N Do 2016 International Conference on Microelectronic Test Structures (ICMTS …, 2016 | 2 | 2016 |
| CREDI-crypt: An improvised anti-counterfeiting technique for credit card transaction system S Hariharan, VN Kumar, M Rochan 13th International Conference on Advanced Communication Technology …, 2011 | 1 | 2011 |
| Current Forming Of Resistive Random Access Memory (RRAM) Cell Filament S Hariharan, H Van Tran, F Zhou, X Liu, S Lemke, N Do, Z Chen, ... US Patent App. 15/597,709, 2018 | | 2018 |
| Current Forming Of Resistive Random Access Memory (RRAM) Cell Filament ND Santosh Hariharan, Hieu Van Tran, Feng Zhou, Xian Liu, Steven Lemke US Patent 10,276,236, 2018 | | 2018 |
| Resistive random access memory (RRAM) cell filament formation using current waveforms XW Santosh Hariharan, Hieu Van Tran, Feng Zhou, Xian Liu, Steven Lemke, Nhan ... SG Patent 10,276,236, 2017 | | 2017 |
| A 55 nm Logic-ProcessCompatible, Split-Gate Flash Memory Array Fully Demonstrated at Automotive Temperature with High Access Speed and Reliability SH Nhan Do, Latt Tee International Memory Workshop 2015, 2015 | | 2015 |
| SPICE Modeling of 55nm Embedded Superflash® Memory Cells ND S. Martinie, O. Rozeau, M. Tadayoni, C. Raynaud, E. Nowak, S. Hariharan IEEE International Conference on Microelectronic Test Structures, 2015 | | 2015 |
| A 55 nm Logic-ProcessCompatible, Split-Gate Flash Memory Array Fully Demonstrated at Automotive Temperature with High Access Speed and Reliability | | |
