| An 8GS/s time-interleaved SAR ADC with unresolved decision detection achieving −58dBFS noise and 4GHz bandwidth in 28nm CMOS JP Keane, NJ Guilar, D Stepanovic, B Wuppermann, C Wu, CW Tsang, ... 2017 IEEE International Solid-State Circuits Conference (ISSCC), 2017 | 59 | 2017 |
| A Wideband 400 MHz-to-4 GHz Direct RF-to-Digital Multimode Receiver C Wu, E Alon, B Nikolić IEEE Journal of Solid-State Circuits 49 (7), 1639-1652, 2014 | 50 | 2014 |
| An Interference-Resilient Wideband Mixer-First Receiver With LO Leakage Suppression and I/Q Correlated Orthogonal Calibration C Wu, Y Wang, B Nikolić, C Hull IEEE, 2016 | 40 | 2016 |
| A passive-mixer-first receiver with LO leakage suppression, 2.6dB NF, >15dBm wide-band IIP3, 66dB IRR supporting non-contiguous carrier aggregation C Wu, Y Wang, B Nikolic, C Hull Radio Frequency Integrated Circuits Symposium (RFIC), 2015 IEEE, 2015 | 22 | 2015 |
| A Wideband All-Digital CMOS RF Transmitter on HDI Interposers With High Power and Efficiency NC Kuo, B Yang, A Wang, L Kong, C Wu, VP Srini, E Alon, B Nikolić, ... IEEE Transactions on Microwave Theory and Techniques, 2017 | 19 | 2017 |
| A 0.4-to-4-GHz all-digital RF transmitter package with a band-selecting interposer combining three wideband CMOS transmitters NC Kuo, B Yang, A Wang, L Kong, C Wu, VP Srini, E Alon, B Nikolić, ... IEEE Transactions on Microwave Theory and Techniques 66 (11), 4967-4984, 2018 | 10 | 2018 |
| A 0.4 GHz–4 GHz direct RF-to-digital ΣΔ multi-mode receiver C Wu, B Nikolic 2013 Proceedings of the ESSCIRC (ESSCIRC), 275-278, 2013 | 9 | 2013 |
| Darpa urban challenge technical paper: Sydney-Berkeley driving team B Upcroft, M Moser, A Makarenko, D Johnson, A Donikian, A Alempijevic, ... University of Sydney, 2007 | 8 | 2007 |
| A frequency-reconfigurable multi-standard 65nm CMOS digital transmitter with LTCC interposers NC Kuo, USA Berkeley Wireless Research Center, Berkeley, CA, 94709, ... ASSCC, 345 - 348, 2014 | 7 | 2014 |
| Analog delay lines and analog readout systems C Wu, KA Nishimura, KD Poulton US Patent 11,329,640, 2022 | 1 | 2022 |
| Next Generation Wireless Receiver Architecture Design in Deep-Sub-Micron CMOS Technology C Wu University of California, Berkeley, 2016 | | 2016 |
| Study of DPLL Structures for High Speed Sampling Circuit C Wu, J Kwak, J Yaquian | | 2010 |
| A Realization of a Below-1-V Operational and 30-MS/s Sample-and-Hold IC With a 56-dB Signal-to-Noise Ratio by Applying the Current-Based Circuit Approach … U Eduri, F Maloberti, CY Wu, YY Liow, Y Chiu, CW Tsang, B Nikolic, ... | | |
| Study of Low Phase Noise DPLL Structures C Wu, J Yaquian, J Kwak | | |
| Study of Novel DPLL Structures for High-Speed Communication C Wu, J Kwak, J Yaquian | | |
Borivoje NikolicUniversity of California BerkeleyVerifierad e-postadress på berkeley.edu
