Anton Blad
Anton Blad
Verifierad e-postadress på qti.qualcomm.com
Titel
Citeras av
Citeras av
År
Architectures for cognitive radio testbeds and demonstrators—an overview
O Gustafsson, K Amiri, D Andersson, A Blad, C Bonnet, JR Cavallaro, ...
2010 Proceedings of the Fifth International Conference on Cognitive Radio …, 2010
332010
Integer linear programming-based bit-level optimization for high-speed FIR decimation filter architectures
A Blad, O Gustafsson
Circuits, Systems and Signal Processing 29 (1), 81-101, 2010
312010
An early decision decoding algorithm for LDPC codes using dynamic thresholds
A Blad, O Gustafsson, L Wanhammar
Proceedings of the 2005 European Conference on Circuit Theory and Design …, 2005
172005
Cooperative communications with HARQ in a wireless mesh network based on 3GPP LTE
AM Cipriano, P Agostini, A Blad, R Knopp
2012 Proceedings of the 20th European signal processing conference (EUSIPCO …, 2012
132012
Spectrum sensing of OFDM signals in the presence of CFO: New algorithms and empirical evaluation using USRP
A Blad, E Axell, EG Larsson
2012 IEEE 13th International Workshop on Signal Processing Advances in …, 2012
102012
A general formulation of analog-to-digital converters using parallel sigma-delta modulators and modulation sequences
A Blad, H Johansson, P Lowenborg
APCCAS 2006-2006 IEEE Asia Pacific Conference on Circuits and Systems, 438-441, 2006
92006
Bit-level optimized FIR filter architectures for high-speed decimation applications
A Blad, O Gustafsson
2008 IEEE International Symposium on Circuits and Systems, 1914-1917, 2008
72008
An RF sampling radio frontend based on ΣΔ-conversion
A Blad, C Svensso, H Johansson, S Andersson
2006 NORCHIP, 133-136, 2006
72006
FPGA implementation of rate-compatible QC-LDPC code decoder
A Blad, O Gustafsson
2011 20th European Conference on Circuit Theory and Design (ECCTD), 777-780, 2011
62011
Redundancy reduction for high-speed FIR filter architectures based on carry-save adder trees
A Blad, O Gustafsson
Proceedings of 2010 IEEE International Symposium on Circuits and Systems …, 2010
52010
Early-decision decoding of LDPC codes
A Blad
Linköping University Electrnoic Press, 2009
42009
Multirate Formulation for Mismatch Sensitivity Analysis of Analog-to-Digital Converters That Utilize Parallel-Modulators
A Blad, H Johansson, P Löwenborg
EURASIP Journal on Advances in Signal Processing 2008, 1-11, 2007
42007
Design trade-offs for linear-phase FIR decimation filters and ΣΔ-modulators
A Blad, P Löwenborg, H Johansson
2006 14th European Signal Processing Conference, 1-5, 2006
32006
A hybrid early decision-probability propagation decoding algorithm for low-density parity-check codes
A Blad, O Gustafsson, L Wanhammar
Conference Record of the Thirty-Ninth Asilomar Conference onSignals, Systems …, 2005
32005
Adaptive Network Coding Based on the Mutual-Information Model
Z Shen, Z Fei, C Luo, A Blad, J Kuang
2011 International Symposium on Networking Coding, 1-5, 2011
22011
Rate-compatible LDPC code decoder using check-node merging
A Blad, O Gustafsson, M Zheng, Z Fei
2010 Conference Record of the Forty Fourth Asilomar Conference on Signals …, 2010
22010
Efficient Decoding Algorithms for Low-Density Parity-Check Codes
A Blad
Institutionen för systemteknik, 2005
22005
Low-complexity reliability-based message-passing decoder architectures for non-binary LDPC codes
Z Xinmiao, R Lidl, H Niederreiter, RJ McEliece, AJ Menezes, ...
VLSI Architectures for Modern Error-Correcting Codes 13 (4), 1-22, 2016
12016
Integer linear programming based optimization of puncturing sequences for quasi-cyclic low-density parity-check codes
A Blad, O Gustafsson, M Zheng, F Zesong
2010 6th International Symposium on Turbo Codes & Iterative Information …, 2010
12010
Power efficient partial repeated cooperation scheme with regular ldpc code
M Zheng, Z Fei, X Chen, J Kuang, A Blad
2010 IEEE 71st Vehicular Technology Conference, 1-5, 2010
12010
Systemet kan inte utföra åtgärden just nu. Försök igen senare.
Artiklar 1–20