Handbook of algorithms for physical design automation CJ Alpert, DP Mehta, SS Sapatnekar CRC press, 2008 | 374 | 2008 |
GAN-OPC: Mask optimization with lithography-guided generative adversarial nets H Yang, S Li, Y Ma, B Yu, EFY Young Proceedings of the 55th Annual Design Automation Conference, 1-6, 2018 | 173 | 2018 |
Ripple: An effective routability-driven placer by iterative cell movement X He, T Huang, L Xiao, H Tian, G Cui, EFY Young 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 74-79, 2011 | 161* | 2011 |
Layout hotspot detection with feature tensor generation and deep biased learning H Yang, J Su, Y Zou, B Yu, EFY Young Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017 | 158 | 2017 |
Fast and accurate estimation of quality of results in high-level synthesis with machine learning S Dai, Y Zhou, H Zhang, E Ustun, EFY Young, Z Zhang 2018 IEEE 26th Annual International Symposium on Field-Programmable Custom …, 2018 | 126 | 2018 |
Twin binary sequences: A non-redundant representation for general non-slicing floorplan EFY Young, CCN Chu, C Shen Proceedings of the 2002 international symposium on Physical design, 196-201, 2002 | 115 | 2002 |
An efficient layout decomposition approach for triple patterning lithography J Kuang, EFY Young Proceedings of the 50th Annual Design Automation Conference, 1-6, 2013 | 106 | 2013 |
Integrated floorplanning and interconnect planning HM Chen, MDF Wong, H Zhou, FY Young, HH Yang, N Sherwani Layout optimization in VLSI design, 1-18, 2001 | 106 | 2001 |
Simultaneous handling of symmetry, common centroid, and general placement constraints Q Ma, L Xiao, YC Tam, EFY Young IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2010 | 103 | 2010 |
Dr. CU 2.0: A scalable detailed routing framework with correct-by-construction design rule satisfaction H Li, G Chen, B Jiang, J Chen, EFY Young 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-7, 2019 | 98* | 2019 |
Enabling online learning in lithography hotspot detection with information-theoretic feature optimization H Zhang, B Yu, EFY Young 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2016 | 98 | 2016 |
Slicing floorplans with boundary constraints FY Young, DF Wong, HH Yang IEEE transactions on computer-aided design of integrated circuits and …, 1999 | 85 | 1999 |
Analog placement with symmetry and other placement constraints YC Tam, EFY Young, C Chu Proceedings of the 2006 IEEE/ACM international conference on Computer-aided …, 2006 | 74 | 2006 |
CUGR: Detailed-routability-driven 3D global routing with probabilistic resource model J Liu, CW Pui, F Wang, EFY Young 2020 57th ACM/IEEE Design Automation Conference (DAC), 1-6, 2020 | 71 | 2020 |
Routability driven floorplanner with buffer block planning CW Sham, EFY Young Proceedings of the 2002 international symposium on Physical design, 50-55, 2002 | 69 | 2002 |
Clock-aware ultrascale FPGA placement with machine learning routability prediction CW Pui, G Chen, Y Ma, EFY Young, B Yu 2017 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 929-936, 2017 | 67 | 2017 |
Placement constraints in floorplan design EFY Young, CCN Chu, ML Ho IEEE Transactions on Very Large Scale Integration (VLSI) Systems 12 (7), 735-745, 2004 | 66 | 2004 |
Slicing floorplans with range constraint FY Young, DF Wong Proceedings of the 1999 international symposium on Physical design, 97-102, 1999 | 66 | 1999 |
Practical placement and routing techniques for analog circuit designs L Xiao, EFY Young, X He, KP Pun 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 675-679, 2010 | 65 | 2010 |
RippleFPGA: A routability-driven placement for large-scale heterogeneous FPGAs CW Pui, G Chen, WK Chow, KC Lam, J Kuang, P Tu, H Zhang, ... 2016 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 1-8, 2016 | 64 | 2016 |