| A monolithic current-mode buck converter with advanced control and protection circuits FF Ma, WZ Chen, JC Wu IEEE Transactions on power electronics 22 (5), 1836-1846, 2007 | 217 | 2007 |
| A 1.8-V 10-Gb/s fully integrated CMOS optical receiver analog front-end WZ Chen, YL Cheng, DS Lin IEEE Journal of Solid-State Circuits 40 (6), 1388-1396, 2005 | 158 | 2005 |
| A 10-Gb/s OEIC with Meshed Spatially-Modulated Photo Detector in 0.18- CMOS Technology SH Huang, WZ Chen, YW Chang, YT Huang IEEE Journal of Solid-State Circuits 46 (5), 1158-1169, 2011 | 96 | 2011 |
| Wide tunning range 60 GHz VCO and 40 GHz DCO using single variable inductor TY Lu, CY Yu, WZ Chen, CY Wu IEEE Transactions on Circuits and Systems I: Regular Papers 60 (2), 257-267, 2012 | 89 | 2012 |
| 18 GHz and 7 GHz superharmonic injection-locked dividers in 0.25 µm CMOS technology WZ Chen, CL Kuo Proceedings of the 28th European Solid-State Circuits Conference, 89-92, 2002 | 81 | 2002 |
| A 7.1 mW, 10 GHz all digital frequency synthesizer with dynamically reconfigured digital loop filter in 90 nm CMOS technology SY Yang, WZ Chen, TY Lu IEEE Journal of Solid-State Circuits 45 (3), 578-586, 2010 | 80 | 2010 |
| A 3.125 Gbps CMOS fully integrated optical receiver with adaptive analog equalizer WZ Chen, SH Huang, GW Wu, CC Liu, YT Huang, CF Chiu, WH Chang, ... 2007 IEEE Asian Solid-State Circuits Conference, 396-399, 2007 | 69 | 2007 |
| A 3–10 GHz, 14 bands CMOS frequency synthesizer with spurs reduction for MB-OFDM UWB system TY Lu, WZ Chen IEEE transactions on very large scale integration (VLSI) systems 20 (5), 948-958, 2011 | 68 | 2011 |
| Design and anaylsis of a 2.5-Gbps optical receiver analog front-end in a 0.35-/spl mu/m digital CMOS technology WZ Chen, CH Lu IEEE Transactions on Circuits and Systems I: Regular Papers 53 (5), 977-983, 2006 | 64 | 2006 |
| A 2.5 Gbps CMOS fully integrated optical receicer with lateral PIN detector WZ Chen, SH Huang 2007 IEEE Custom Integrated Circuits Conference, 293-296, 2007 | 59 | 2007 |
| Three-dimensional fully symmetric inductors, transformer, and balun in CMOS technology WZ Chen, WH Chen, KC Hsu IEEE Transactions on Circuits and Systems I: Regular Papers 54 (7), 1413-1423, 2007 | 51 | 2007 |
| Fast analog layout prototyping for nanometer design migration YP Weng, HM Chen, TC Chen, PC Pan, CH Chen, WZ Chen 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD), 517-522, 2011 | 43 | 2011 |
| A 2.5 Gbps CMOS optical receiver analog front-end WZ Chen, CH Lu Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No …, 2002 | 42 | 2002 |
| A 2-V, 1.8-GHz BJT phase-locked loop WZ Chen, JT Wu IEEE Journal of Solid-State Circuits 34 (6), 784-789, 1999 | 42 | 1999 |
| Symmetrical stacked inductor WZ Chen, WH Chen US Patent 6,870,457, 2005 | 38 | 2005 |
| Bandwidth enhancement techniques for transimpedance amplifier in CMOS technologies CH Lu, WZ Chen Proceedings of the 27th European Solid-state circuits Conference, 174-177, 2001 | 38 | 2001 |
| Phase-locked loop with loop gain calibration, gain measurement method, gain calibration method and jitter measurement method for phase-locked loop WZ Chen, SC Chuang US Patent 8,860,478, 2014 | 37 | 2014 |
| A 25 Gb/s 1.13 pJ/b− 10.8 dBm input sensitivity optical receiver in 40 nm CMOS SH Huang, WZ Chen IEEE Journal of Solid-State Circuits 52 (3), 747-756, 2017 | 36 | 2017 |
| A 7.1 mW 10GHz all-digital frequency synthesizer with dynamically reconfigurable digital loop filter in 90nm CMOS SY Yang, WZ Chen 2009 IEEE International Solid-State Circuits Conference-Digest of Technical …, 2009 | 35 | 2009 |
| A 90- 10-Gb/s Optical Receiver Analog Front-End in a 0.18- CMOS Technology WZ Chen, DS Lin IEEE transactions on very large scale integration (VLSI) systems 15 (3), 358-365, 2007 | 32 | 2007 |
