Shuwen Deng
Shuwen Deng
PhD Candidate, Yale University
Verified email at yale.edu
Title
Cited by
Cited by
Year
XMSS and Embedded Systems
W Wang, B Jungk, J Wälde, S Deng, N Gupta, J Szefer, R Niederhagen
International Conference on Selected Areas in Cryptography, 523-550, 2019
212019
XMSS and Embedded Systems: XMSS Hardware Accelerators for RISC-V
W Wang, B Jungk, J Wälde, S Deng, N Gupta, J Szefer, R Niederhagen
Selected Areas in Cryptography, 2019
21*2019
Topological approach to automatic symbolic macromodel generation for analog integrated circuits
G Shi, H Hu, S Deng
ACM Transactions on Design Automation of Electronic Systems (TODAES) 22 (3 …, 2017
132017
Cache timing side-channel vulnerability checking with computation tree logic
S Deng, W Xiong, J Szefer
Proceedings of the 7th International Workshop on Hardware and Architectural …, 2018
122018
Secure TLBs
S Deng, W Xiong, J Szefer
Proceedings of the 46th International Symposium on Computer Architecture …, 2019
72019
Analysis of Secure Caches Using a Three-Step Model for Timing-Based Attacks
S Deng, W Xiong, J Szefer
Journal of Hardware and Systems Security 3 (4), 397-425, 2019
42019
Analysis of Secure Caches and Timing-Based Side-Channel Attacks.
S Deng, W Xiong, J Szefer
IACR Cryptology ePrint Archive 2019, 167, 2019
42019
SecChisel: Language and Tool for Practical and Scalable Security Verification of Security-Aware Hardware Architectures.
S Deng, D Gümüsoglu, W Xiong, YS Gener, O Demir, J Szefer
IACR Cryptology ePrint Archive 2017, 193, 2017
42017
SecChisel Framework for Security Verification of Secure Processor Architectures
S Deng, D Gümüşoğlu, W Xiong, S Sari, YS Gener, C Lu, O Demir, ...
Proceedings of the 8th International Workshop on Hardware and Architectural …, 2019
22019
A Benchmark Suite for Evaluating Caches' Vulnerability to Timing Attacks
S Deng, W Xiong, J Szefer
Proceedings of the Twenty-Fifth International Conference on Architectural …, 2020
12020
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