Fabio Salice
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Source-level execution time estimation of C programs
C Brandolese, W Fornaciari, F Salice, D Sciuto
Proceedings of the ninth international symposium on Hardware/software …, 2001
892001
An instruction-level functionally-based energy estimation model for 32-bits microprocessors
C Brandolese, W Fornaciari, F Salice, D Sciuto
Proceedings of the 37th Annual Design Automation Conference, 346-351, 2000
782000
An area estimation methodology for FPGA based designs at systemc-level
C Brandolese, W Fornaciari, F Salice
Proceedings of the 41st annual Design Automation Conference, 129-132, 2004
752004
A software methodology for detecting hardware faults in VLIW data paths
C Bolchini
IEEE Transactions on Reliability 52 (4), 458-468, 2003
742003
Logical and physical design issues for smart card databases
C Bolchini, F Salice, FA Schreiber, L Tanca
ACM Transactions on Information Systems (TOIS) 21 (3), 254-285, 2003
632003
Design of VHDL-based totally self-checking finite-state machine and data-path descriptions
C Bolchini, R Montandon, F Salice, D Sciuto
IEEE Transactions on very large scale integration (VLSI) systems 8 (1), 98-103, 2000
592000
Metrics for design space exploration of heterogeneous multiprocessor embedded systems
D Sciuto, F Salice, L Pomante, W Fornaciari
Proceedings of the tenth international symposium on Hardware/software …, 2002
572002
Affinity-driven system design exploration for heterogeneous multiprocessor SoC
C Brandolese, W Fornaciari, L Pomante, F Salice, D Sciuto
IEEE transactions on computers 55 (5), 508-519, 2006
442006
LAURA—LocAlization and Ubiquitous monitoRing of pAtients for health care support
A Redondi, M Tagliasacchi, M Cesana, L Borsani, P Tarrío, F Salice
2010 IEEE 21st International Symposium on Personal, Indoor and Mobile Radio …, 2010
432010
The impact of source code transformations on software power and energy consumption
C Brandolese, W Fornaciari, F Salice, D Sciuto
Journal of Circuits, Systems, and Computers 11 (05), 477-502, 2002
382002
A first step towards Hw/Sw partitioning of UML specifications
W Fornaciari, P Micheli, F Salice, L Zampella
2003 Design, Automation and Test in Europe Conference and Exhibition, 668-673, 2003
332003
Reliability properties assessment at system level: A co-design framework
C Bolchini, L Pomante, F Salice, D Sciuto
Proceedings Seventh International On-Line Testing Workshop, 165-171, 2001
332001
A novel methodology for designing TSC networks based on the parity bit code
C Bolchini, F Salice, D Sciuto
Proceedings European Design and Test Conference. ED & TC 97, 440-444, 1997
321997
Designing self-checking FPGAs through error detection codes
C Bolchini, F Salice, D Sciuto
17th IEEE International Symposium on Defect and Fault Tolerance in VLSI …, 2002
292002
Energy estimation for 32-bit microprocessors
C Brandolese, W Fornaciari, F Salice, D Sciuto
Proceedings of the Eighth International Workshop on Hardware/Software …, 2000
282000
A model of soft error effects in generic IP processors
C Bolchini, A Miele, F Salice, D Sciuto
20th IEEE International Symposium on Defect and Fault Tolerance in VLSI …, 2005
272005
Static power modeling of 32-bit microprocessors
C Brandolese, F Salice, W Fornaciari, D Sciuto
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2002
272002
Bridge: Mutual reassurance for autonomous and independent living
S Mangano, H Saidinejad, F Veronese, S Comai, M Matteucci, F Salice
IEEE Intelligent Systems 30 (4), 31-38, 2015
242015
An incremental approach to functional diagnosis
L Amati, C Bolchini, L Frigerio, F Salice, W Eklow, A Suvatne, E Brambilla, ...
2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI …, 2009
242009
A multi-level strategy for software power estimation
C Brandolese, W Fornaciari, L Pomante, F Salice, D Sciuto
Proceedings 13th International Symposium on System Synthesis, 187-192, 2000
242000
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Artiklar 1–20