Jing Wang
Jing Wang
Director of Device Research, Samsung Semiconductor Inc.
Verifierad e-postadress på samsung.com
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A three-dimensional quantum simulation of silicon nanowire transistors with the effective-mass approximation
J Wang, E Polizzi, M Lundstrom
Journal of Applied Physics 96 (4), 2192-2203, 2004
4242004
On the validity of the parabolic effective-mass approximation for the IV calculation of silicon nanowire transistors
J Wang, A Rahman, A Ghosh, G Klimeck, M Lundstrom
IEEE Transactions on Electron Devices 52 (7), 1589-1595, 2005
1972005
Theoretical investigation of surface roughness scattering in silicon nanowire transistors
J Wang, E Polizzi, A Ghosh, S Datta, M Lundstrom
Applied Physics Letters 87 (4), 043101, 2005
1732005
Does source-to-drain tunneling limit the ultimate scaling of MOSFETs?
J Wang, M Lundstrom
Digest. International Electron Devices Meeting,, 707-710, 2002
1562002
Ballistic transport in high electron mobility transistors
J Wang, M Lundstrom
IEEE Transactions on Electron Devices 50 (7), 1604-1609, 2003
1422003
High performance MOSFET
H Zhu, J Wang
US Patent 7,704,844, 2010
1382010
Metal gated ultra short MOSFET devices
JO Chu, BB Doris, M Ieong, J Wang
US Patent 7,348,629, 2008
1372008
High performance MOSFET
H Zhu, J Wang
US Patent 8,299,540, 2012
1182012
Metal gated ultra short MOSFET devices
JO Chu, BB Doris, M Ieong, J Wang
US Patent 7,678,638, 2010
1172010
Method for metal gated ultra short MOSFET devices
JO Chu, BB Doris, M Ieong, J Wang
US Patent 7,494,861, 2009
1162009
Electrostatics of nanowire transistors
J Guo, J Wang, E Polizzi, S Datta, M Lundstrom
IEEE Transactions on Nanotechnology 2 (4), 329-334, 2003
1142003
A computational study of ballistic silicon nanowire transistors
J Wang, E Polizzi, M Lundstrom
International Electron Devices Meeting, 695-698, 2003
742003
Performance evaluation of ballistic silicon nanowire transistors with atomic-basis dispersion relations
J Wang, A Rahman, A Ghosh, G Klimeck, M Lundstrom
Applied Physics Letters 86 (9), 093113-093113-3, 2005
692005
Bandstructure and orientation effects in ballistic Si and Ge nanowire FETs
J Wang, A Rahman, G Klimeck, M Lundstrom
IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest., 4 …, 2005
672005
Device design and manufacturing issues for 10 nm-scale MOSFETs: a computational study
S Hasan, J Wang, M Lundstrom
Solid-State Electronics 48 (6), 867-875, 2004
602004
Gate-induced-drain-leakage current in 45-nm CMOS technology
X Yuan, JE Park, J Wang, E Zhao, DC Ahlgren, T Hook, J Yuan, ...
IEEE Transactions on Device and Materials Reliability 8 (3), 501-508, 2008
492008
Technology scaling and device design for 350 GHz RF performance in a 45nm bulk CMOS process
H Li, B Jagannathan, J Wang, TC Su, S Sweeney, JJ Pekarik, Y Shi, ...
2007 IEEE Symposium on VLSI Technology, 56-57, 2007
462007
A general approach for the performance assessment of nanoscale silicon FETs
J Wang, PM Solomon, M Lundstrom
IEEE transactions on electron devices 51 (9), 1366-1370, 2004
372004
Device physics and simulation of silicon nanowire transistors
J Wang
Purdue University, 2005
302005
Method and structure for enhancing both nMOSFET and pMOSFET performance with a stressed film
H Zhu, J Wang, BB Doris, Z Ren
US Patent 7,326,997, 2008
252008
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