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Rock-Hyun Baek
Rock-Hyun Baek
POSTECH, Electrical Engineering
Verified email at postech.ac.kr
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Cited by
Cited by
Year
Electrical characteristics of 20-nm junctionless Si nanowire transistors
CH Park, MD Ko, KH Kim, RH Baek, CW Sohn, CK Baek, S Park, MJ Deen, ...
Solid-State Electronics 73, 7-10, 2012
1672012
Systematic DC/AC performance benchmarking of sub-7-nm node FinFETs and nanosheet FETs
JS Yoon, J Jeong, S Lee, RH Baek
IEEE Journal of the Electron Devices Society 6, 942-947, 2018
592018
Low-temperature performance of nanoscale MOSFET for deep-space RF applications
SH Hong, GB Choi, RH Baek, HS Kang, SW Jung, YH Jeong
IEEE Electron Device Letters 29 (7), 775-777, 2008
582008
Multi- Strategies of 7-nm node Nanosheet FETs With Limited Nanosheet Spacing
JS Yoon, J Jeong, S Lee, RH Baek
IEEE Journal of the Electron Devices Society 6, 861-865, 2018
542018
Junction design strategy for Si bulk FinFETs for system-on-chip applications down to the 7-nm node
JS Yoon, EY Jeong, CK Baek, YR Kim, JH Hong, JS Lee, RH Baek, ...
IEEE Electron Device Letters 36 (10), 994-996, 2015
432015
Sub-100 nm InGaAs quantum-well (QW) tri-gate MOSFETs with Al2O3/HfO2 (EOT < 1 nm) for low-power logic applications
TW Kim, DH Kim, DH Koh, HM Kwon, RH Baek, D Veksler, C Huffman, ...
2013 IEEE International Electron Devices Meeting, 16.3. 1-16.3. 4, 2013
432013
Characteristics of the Series Resistance Extracted From Si Nanowire FETs Using the-Function Technique
RH Baek, CK Baek, SW Jung, YY Yeoh, DW Kim, JS Lee, DM Kim, ...
IEEE Transactions on Nanotechnology 9 (2), 212-217, 2009
362009
Comprehensive analysis of source and drain recess depth variations on silicon nanosheet FETs for sub 5-nm node SoC application
J Jeong, JS Yoon, S Lee, RH Baek
IEEE Access 8, 35873-35881, 2020
332020
Improved Long-Term Responses of Au-Decorated Si Nanowire FET Sensor for NH3 Detection
D Kim, C Park, W Choi, SH Shin, B Jin, RH Baek, JS Lee
IEEE Sensors Journal 20 (5), 2270-2277, 2019
312019
Device design guideline of 5-nm-node FinFETs and nanosheet FETs for analog/RF applications
JS Yoon, RH Baek
IEEE Access 8, 189395-189403, 2020
302020
Reduction of process variations for sub-5-nm node fin and nanosheet FETs using novel process scheme
JS Yoon, S Lee, J Lee, J Jeong, H Yun, RH Baek
IEEE Transactions on Electron Devices 67 (7), 2732-2737, 2020
302020
High-performance III–V devices for future logic applications
DH Kim, TW Kim, RH Baek, PD Kirsch, W Maszara, JA Del Alamo, ...
2014 IEEE International Electron Devices Meeting, 25.2. 1-25.2. 4, 2014
302014
Sensitivity of source/drain critical dimension variations for sub-5-nm node fin and nanosheet FETs
JS Yoon, J Jeong, S Lee, RH Baek
IEEE Transactions on Electron Devices 67 (1), 258-262, 2019
282019
Characterization and Modeling of 1/Noise in Si-nanowire FETs: Effects of Cylindrical Geometry and Different Processing of Oxides
RH Baek, CK Baek, HS Choi, JS Lee, YY Yeoh, KH Yeo, DW Kim, K Kim, ...
IEEE transactions on nanotechnology 10 (3), 417-423, 2010
282010
Bottom oxide bulk FinFETs without punch-through-stopper for extending toward 5-nm node
JS Yoon, J Jeong, S Lee, RH Baek
IEEE Access 7, 75762-75767, 2019
272019
Punch-through-stopper free nanosheet FETs with crescent inner-spacer and isolated source/drain
JS Yoon, J Jeong, S Lee, RH Baek
IEEE Access 7, 38593-38596, 2019
272019
Optimization of nanosheet number and width of multi-stacked nanosheet FETs for sub-7-nm node system on chip applications
JS Yoon, J Jeong, S Lee, RH Baek
Japanese Journal of Applied Physics 58 (SB), SBBA12, 2019
262019
Device design guidelines for nanoscale FinFETs in RF/analog applications
CW Sohn, CY Kang, RH Baek, DY Choi, HC Sagong, EY Jeong, CK Baek, ...
IEEE electron device letters 33 (9), 1234-1236, 2012
262012
Neural approach for modeling and optimizing Si-MOSFET manufacturing
HC Choi, H Yun, JS Yoon, RH Baek
IEEE Access 8, 159351-159370, 2020
252020
Process-induced variations of 10-nm node bulk nFinFETs considering middle-of-line parasitics
JS Yoon, CK Baek, RH Baek
IEEE Transactions on Electron Devices 63 (9), 3399-3405, 2016
252016
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