| Analysis and compact modeling of negative capacitance transistor with high ON-current and negative output differential resistance—Part II: Model validation G Pahwa, T Dutta, A Agarwal, S Khandelwal, S Salahuddin, C Hu, ... IEEE Transactions on Electron Devices 63 (12), 4986-4992, 2016 | 202 | 2016 |
| Analysis and Compact Modeling of Negative Capacitance Transistor with High ON-Current and Negative Output Differential Resistance-Part I: Model Description G Pahwa, T Dutta, A Agarwal, S Khandelwal, S Salahuddin, C Hu, ... IEEE Transactions on Electron Devices 63 (12), 4981 - 4985, 2016 | 202 | 2016 |
| Physical insights on negative capacitance transistors in nonhysteresis and hysteresis regimes: MFMIS versus MFIS structures G Pahwa, T Dutta, A Agarwal, YS Chauhan IEEE Transactions on Electron Devices 65 (3), 867-873, 2018 | 125 | 2018 |
| Compact model for ferroelectric negative capacitance transistor with MFIS structure G Pahwa, T Dutta, A Agarwal, YS Chauhan IEEE Transactions on Electron Devices 64 (3), 1366-1374, 2017 | 107 | 2017 |
| Performance evaluation of 7-nm node negative capacitance FinFET-based SRAM T Dutta, G Pahwa, AR Trivedi, S Sinha, A Agarwal, YS Chauhan IEEE Electron Device Letters 38 (8), 1161-1164, 2017 | 94 | 2017 |
| Designing energy efficient and hysteresis free negative capacitance FinFET with negative DIBL and 3.5X IONusing compact modeling approach G Pahwa, T Dutta, A Agarwal, YS Chauhan ESSCIRC Conference 2016: 42nd European Solid-State Circuits Conference, 49-54, 2016 | 78 | 2016 |
| Impact of process variations on negative capacitance FinFET devices and circuits T Dutta, G Pahwa, A Agarwal, YS Chauhan IEEE Electron Device Letters 39 (1), 147-150, 2017 | 50 | 2017 |
| Impact of Channel Thickness Variation on Bandstructure and Source-to-Drain Tunneling in Ultra-Thin Body III-V MOSFETs T Dutta, S Kumar, P Rastogi, A Agarwal, YS Chauhan IEEE Journal of Electron Devices Society 4 (2), 66-71, 2016 | 38 | 2016 |
| Quantum confinement effects in extremely thin body germanium n-MOSFETs P Rastogi, T Dutta, S Kumar, A Agarwal, YS Chauhan IEEE Transactions on Electron Devices 62 (11), 3575-3580, 2015 | 35 | 2015 |
| Nano‑electronic Simulation Software (NESS): a flexible nano‑device simulation platform S Berrada, H Carrillo-Nunez, J Lee, C Medina-Bailon, T Dutta, O Badami, ... Journal of Computational Electronics 19, 1031–1046, 2020 | 30 | 2020 |
| NESS: new flexible nano-electronic simulation software S Berrada, T Dutta, H Carrillo-Nunez, M Duan, F Adamu-Lema, J Lee, ... 2018 International Conference on Simulation of Semiconductor Processes and …, 2018 | 20 | 2018 |
| Accurate boundary condition for short-channel effect compact modeling in MOS devices G Hiblot, T Dutta, Q Rafhay, J Lacord, M Akbal, F Boeuf, G Ghibaudo IEEE Transactions on Electron Devices 62 (1), 28-35, 2014 | 18 | 2014 |
| Modeling of the impact of source/drain regions on short channel effects in MOSFETs T Dutta, Q Rafhay, G Pananakakis, G Ghibaudo 2013 14th International Conference on Ultimate Integration on Silicon (ULIS …, 2013 | 18 | 2013 |
| Random discrete dopant induced variability in negative capacitance transistors T Dutta, V Georgiev, A Asenov 2018 Joint International EUROSOI Workshop and International Conference on …, 2018 | 12 | 2018 |
| Origins of the short channel effects increase in III-V nMOSFET technologies T Dutta, Q Rafhay, R Clerc, J Lacord, S Monfray, G Pananakakis, F Boeuf, ... 2012 13th International Conference on Ultimate Integration on Silicon (ULIS …, 2012 | 12 | 2012 |
| Energy-Delay Tradeoffs in Negative Capacitance FinFET based CMOS Circuits G Pahwa, T Dutta, A Agarwal, YS Chauhan 3rd International Conference on Emerging Electronics (ICEE), Mumbai, 2016 | 11 | 2016 |
| Atomistic study of band structure and transport in extremely thin channel InP MOSFETs T Dutta, P Kumar, P Rastogi, A Agarwal, YS Chauhan physica status solidi (a) 213 (4), 898-904, 2016 | 10 | 2016 |
| Simulation and modeling of novel electronic device architectures with NESS (nano-electronic simulation software): A modular nano TCAD simulation framework C Medina-Bailon, T Dutta, A Rezaei, D Nagy, F Adamu-Lema, ... Micromachines 12 (6), 680, 2021 | 9 | 2021 |
| Nano-electronic simulation software (NESS): a novel open-source TCAD simulation environment C Medina-Bailon, T Dutta, F Adamu-Lema, A Rezaei, D Nagy, ... Journal of Microelectronic Manufacturing 3 (4), 2020 | 9 | 2020 |
| Schrödinger Equation Based Quantum Corrections in Drift-Diffusion: A Multiscale Approach T Dutta, C Medina-Bailon, H Carrillo-Nuñez, O Badami, VP Georgiev, ... 14th IEEE Nanotechnology Materials and Devices Conference (NMDC), Stockholm …, 2019 | 9 | 2019 |
Yogesh S. ChauhanFellow IEEE, FNAE, Professor-IIT KanpurVerified email at iitk.ac.in
