Sujay Phadke
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Ultra low-cost defect protection for microprocessor pipelines
S Shyam, K Constantinides, S Phadke, V Bertacco, T Austin
ACM Sigplan Notices 41 (11), 73-82, 2006
1662006
MLP aware heterogeneous memory system
S Phadke, S Narayanasamy
Design, Automation & Test in Europe Conference & Exhibition (DATE), 2011, 1-6, 2011
992011
On design and implementation of an embedded automatic speech recognition system
S Phadke, R Limaye, S Verma, K Subramanian
17th International Conference on VLSI Design. Proceedings., 127-132, 2004
502004
Microprocessor and method for detecting faults therein
V Bertacco, TM Austin, S Shyam, K Constantinides, S Phadke
US Patent 7,966,538, 2011
272011
Microprocessor and method for detecting faults therein
V Bertacco, TM Austin, S Shyam, K Constantinides, S Phadke
US Patent 8,341,473, 2012
92012
Microprocessor and method for detecting faults therein
V Bertacco, TM Austin, S Shyam, K Constantinides, S Phadke
US Patent 8,341,473, 2012
72012
VOLTaiRE: Low-cost Fault Detection Solutions for VLIW Microprocessors
S Shyam, S Phadke, B Lui, H Gupta, V Bertacco, D Blaauw
Ann Arbor 1001, 48109-2122, 2006
72006
VLSI Architectures for IP Lookups
SS Phadke
Indian Institute of Technology, Bombay Mumbai, 2003
12003
Ultra-Low Cost Defect Tolerant Architectures
K Constantinides, M Mehrara, S Phadke, S Shyam, T Austin, V Bertacco
Talk or presentation, Joint Concurrent/Resilient Workshop 9, 2007
2007
Towards An Efficient Low Frequency Energy Recovery Dynamic Logic
SS Phadke
University of Michigan, Ann Arbor, 2005
2005
A Pipelined Architecture for a Reconfigurable FSM based Router
SS Phadke, PD Madhav
Indian Institute of Technology, Bombay Mumbai, 2004
2004
Exploring Optimal Cost-performance designs for a Reconfigurable FSM based Packet Router
SS Phadke
Indian Institute of Technology, Bombay Mumbai, 2003
2003
A VLSI Implementation of a JPEG Decoder
S Shyam, D John, T Kachru, S Phadke
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Artiklar 1–13