Laura Pozzi
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Automatic application-specific instruction-set extensions under microarchitectural constraints
K Atasu, L Pozzi, P Ienne
International Journal of Parallel Programming 31 (6), 411-428, 2003
4222003
Exact and approximate algorithms for the extension of embedded processor instruction sets
L Pozzi, K Atasu, P Ienne
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2006
2472006
Seamless hardware-software integration in reconfigurable computing systems
M Vuletid, L Pozzi, P Ienne
IEEE Design & Test of Computers 22 (2), 102-113, 2005
1182005
Exploiting pipelining to relax register-file port constraints of instruction-set extensions
L Pozzi, P Ienne
Proceedings of the 2005 international conference on Compilers, architectures …, 2005
1092005
Automatic instruction set extension and utilization for embedded processors
A Peymandoust, L Pozzi, P Ienne, G De Micheli
Proceedings IEEE International Conference on Application-Specific Systems …, 2003
982003
EGRA: A coarse grained reconfigurable architectural template
G Ansaloni, P Bonzini, L Pozzi
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 19 (6 …, 2010
962010
A DAG-based design approach for reconfigurable VLIW processors
C Alippi, W Fornaciari, L Pozzi, M Sami
Proceedings of the conference on Design, automation and test in Europe, 57-es, 1999
951999
Introduction of local memory elements in instruction set extensions
P Biswas, V Choudhary, K Atasu, L Pozzi, P Ienne, N Dutt
Proceedings of the 41st annual Design Automation Conference, 729-734, 2004
832004
Polynomial-time subgraph enumeration for automated instruction set extension
P Bonzini, L Pozzi
2007 Design, Automation & Test in Europe Conference & Exhibition, 1-6, 2007
762007
ISEGEN: Generation of high-quality instruction set extensions by iterative improvement
P Biswas, S Banerjee, N Dutt, L Pozzi, P Ienne
Design, Automation and Test in Europe, 1246-1251, 2005
672005
Stream computations organized for reconfigurable execution
A DeHon, Y Markovsky, E Caspi, M Chu, R Huang, S Perissakis, L Pozzi, ...
Microprocessors and microsystems 30 (6), 334-354, 2006
652006
Automatic identification of application-specific functional units with architecturally visible storage
P Biswas, N Dutt, P Ienne, L Pozzi
Proceedings of the Design Automation & Test in Europe Conference 1, 1-6, 2006
56*2006
Virtual memory window for application-specific reconfigurable coprocessors
M Vuletic, L Pozzi, P Ienne
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 14 (8), 910-915, 2006
462006
Recurrence-aware instruction set selection for extensible embedded processors
P Bonzini, L Pozzi
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 16 (10 …, 2008
442008
A simulation-based methodology for evaluating the DPA-resistance of cryptographic functional units with application to CMOS and MCML technologies
F Regazzoni, S Badel, T Eisenbarth, J Grobschadl, A Poschmann, ...
2007 International Conference on Embedded Computer Systems: Architectures …, 2007
442007
Code transformation strategies for extensible embedded processors
P Bonzini, L Pozzi
Proceedings of the 2006 international conference on Compilers, architecture …, 2006
412006
Performance and energy benefits of instruction set extensions in an FPGA soft core
P Biswas, S Banerjee, N Dutt, P Ienne, L Pozzi
19th International Conference on VLSI Design held jointly with 5th …, 2006
412006
ISEGEN: An iterative improvement-based ISE generation technique for fast customization of processors
P Biswas, S Banerjee, ND Dutt, L Pozzi, P Ienne
IEEE Transactions on Very Large Scale Integration (VLSI) Systems 14 (7), 754-762, 2006
392006
Introduction of architecturally visible storage in instruction set extensions
P Biswas, ND Dutt, L Pozzi, P Ienne
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2007
342007
Design and architectural exploration of expression-grained reconfigurable arrays
G Ansaloni, P Bonzini, L Pozzi
2008 Symposium on Application Specific Processors, 26-33, 2008
312008
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Artiklar 1–20