Yazhou  Zu
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Adaptive guardband scheduling to improve system-level efficiency of the POWER7+
Y Zu, CR Lefurgy, J Leng, M Halpern, MS Floyd, VJ Reddi
2015 48th Annual IEEE/ACM International Symposium on Microarchitecture …, 2015
342015
GPU voltage noise: Characterization and hierarchical smoothing of spatial and temporal voltage noise interference in GPU architectures
J Leng, Y Zu, VJ Reddi
2015 IEEE 21st International Symposium on High Performance Computer …, 2015
322015
GPUVolt: Modeling and characterizing voltage noise in GPU architectures
J Leng, Y Zu, M Rhu, M Gupta, VJ Reddi
Proceedings of the 2014 international symposium on Low power electronics and …, 2014
302014
Flying IoT: Toward low-power vision in the sky
H Genc, Y Zu, TW Chin, M Halpern, VJ Reddi
IEEE Micro 37 (6), 40-51, 2017
162017
Ti-states: Processor power management in the temperature inversion region
Y Zu, W Huang, I Paul, VJ Reddi
2016 49th Annual IEEE/ACM International Symposium on Microarchitecture …, 2016
122016
Ivory: Early-stage design space exploration tool for integrated voltage regulators
A Zou, J Leng, Y Zu, T Tong, VJ Reddi, D Brooks, GY Wei, X Zhang
Proceedings of the 54th Annual Design Automation Conference 2017, 1-6, 2017
102017
Energy efficiency benefits of reducing the voltage guardband on the Kepler GPU architecture
J Leng, Y Zu, VJ Reddi
Proc. of SELSE, 2014
102014
Voltage-stacked gpus: A control theory driven cross-layer solution for practical voltage stacking in gpus
A Zou, J Leng, X He, Y Zu, CD Gill, VJ Reddi, X Zhang
2018 51st Annual IEEE/ACM International Symposium on Microarchitecture …, 2018
82018
Efficient and reliable power delivery in voltage-stacked manycore system with hybrid charge-recycling regulators
A Zou, J Leng, X He, Y Zu, VJ Reddi, X Zhang
2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC), 1-6, 2018
52018
An efficient power-aware resource scheduling strategy in virtualized datacenters
Y Zu, T Huang, Y Zhu
2013 International Conference on Parallel and Distributed Systems, 110-117, 2013
42013
Ti-states: Power management in active timing margin processors
Y Zu, W Huang, I Paul, VJ Reddi
IEEE Micro 37 (3), 106-114, 2017
32017
Method and apparatus for temperature and voltage management control
W Huang, Y Zu, I Paul
US Patent 10,649,514, 2020
12020
Voltage-Stacked Power Delivery Systems: Reliability, Efficiency, and Power Management
A Zou, J Leng, X He, Y Zu, CD Gill, VJ Reddi, X Zhang
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2020
12020
Determination and correction of physical circuit event related errors of a hardware design
P Bose, A Buyuktosunoglu, S Eldridge, KV Swaminathan, Y Zu
US Patent 10,365,327, 2019
12019
Fine-Tuning the Active Timing Margin (ATM) Control Loop for Maximizing Multi-Core Efficiency on an IBM POWER Server
Y Zu, D Richins, C Lefurgy, V Reddi
2019 IEEE International Symposium on High Performance Computer Architecture …, 2019
12019
Determination and correction of physical circuit event related errors of a hardware design
P Bose, A Buyuktosunoglu, S Eldridge, KV Swaminathan, Y Zu
US Patent 10,690,723, 2020
2020
Predictive Guardbanding: Program-driven Timing Margin Reduction for GPUs
J Leng, A Buyuktosunoglu, R Bertran, P Bose, Y Zu, VJ Reddi
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems, 2020
2020
Active timing margin management to improve microprocessor power efficiency
Y Zu
2019
10.1 Ivory: Early-Stage Design Space Exploration Tool for Integrated Voltage Regulator
A Zou, J Leng, Y Zu, T Tong, VJ Reddi, D Brooks, GY Wei, X Zhang, ...
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Artiklar 1–19