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Andreas Olofsson
Andreas Olofsson
Zero ASIC
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Title
Cited by
Cited by
Year
Kickstarting high-performance energy-efficient manycore architectures with epiphany
A Olofsson, T Nordström, Z Ul-Abdin
2014 48th Asilomar Conference on Signals, Systems and Computers, 1719-1726, 2014
1242014
Epiphany-v: A 1024 processor 64-bit risc system-on-chip
A Olofsson
arXiv preprint arXiv:1610.01832, 2016
982016
Mesh network
A Olofsson
US Patent 8,531,943, 2013
382013
A 1024-core 70 GFLOP/W floating point manycore microprocessor
A Olofsson, R Trogan, O Raikhman, L Adapteva
Poster on 15th Workshop on High Performance Embedded Computing HPEC2011, 2011
272011
Electronic circuits with dynamic bus partitioning
E Wertheim, AD Olofsson
US Patent 6,662,260, 2003
212003
Retention device for a dynamic logic stage
A Olofsson
US Patent App. 10/688,156, 2005
162005
Variable instruction width software programmable data pattern generator
AD Olofsson, C Jacobs, P Kettle
US Patent App. 11/998,994, 2008
102008
A 4.32 GOPS 1 W general-purpose DSP with an enhanced instruction set for wireless communication
A Olofsson, F Lange
2002 IEEE International Solid-State Circuits Conference. Digest of Technical …, 2002
102002
Silicon compilers-version 2.0
A Olofsson
keynote, Proc. ISPD, 2018
82018
A 600 MHz DSP with 24 Mb embedded DRAM with an enhanced instruction set for wireless communication
Y Adelman, D Agur, T Bennun, O Chalak, Z Greenfield, R Holzer, M Jalfon, ...
2004 IEEE International Solid-State Circuits Conference (IEEE Cat. No …, 2004
82004
Intelligent design of electronic assets (idea) & posh open source hardware (posh)
A Olofsson
DARPA/MTO, 2018
72018
A distributed approach to silicon compilation
A Olofsson, W Ransohoff, N Moroze
Proceedings of the 59th ACM/IEEE Design Automation Conference, 1343-1346, 2022
42022
Software programmable timing architecture
AD Olofsson
US Patent 8,135,975, 2012
42012
A 25 gflops/watt software programmable floating point accelerator
A Olofsson, R Trogan, O Raikhman
High Performance Embedded Computing Computing Conference, 2010
42010
Enabling High-Performance Heterogeneous Integration via Interface Standards, IP Reuse, and Modular Design
A Olofsson, DS Green, J Demmin
International Symposium on Microelectronics 2018 (1), 000246-000251, 2018
32018
A closer look at the Epiphany-IV 28nm 64-core coprocessor
A Olofsson
8th International Conference on High Performance and Embedded Architectures …, 2013
32013
Multi-format multiplier unit
AD Olofsson, B Yanovitch
US Patent 8,275,822, 2012
32012
A manycore coprocessor architecture for heterogeneous computing
A Olofsson
Los Alamos Computer Science Symposium (LACSS) 2009, 2009
32009
Integrated circuits with programmable well biasing
AD Olofsson
US Patent 7,538,569, 2009
22009
Data pattern generator with selectable programmable outputs
C Jacobs, AD Olofsson, P Kettle
US Patent 8,732,440, 2014
12014
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