| Exact zero skew RS Tsay The Best of ICCAD: 20 Years of Excellence in Computer-Aided Design, 509-520, 2003 | 348 | 2003 |
| An exact zero-skew clock routing algorithm RS Tsay IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 1993 | 300 | 1993 |
| PROUD: A sea-of-gates placement algorithm RS Tsay, ES Kuh, CP Hsu IEEE Design & Test of Computers 5 (6), 44-56, 1988 | 253 | 1988 |
| Simulation/emulation system and method P Tseng, SSP Lin, QKH Shen, RY Sun, MMY Tsai, RS Tsay, S Wang US Patent 6,009,256, 1999 | 174 | 1999 |
| Simulation server system and method S Wang, P Tseng, SSP Lin, RS Tsay, RY Sun, QKH Shen, MMY Tsai US Patent 6,134,516, 2000 | 155 | 2000 |
| Electronic design automation tool for the design of a semiconductor integrated circuit chip RS Tsay, CC Chang US Patent 5,461,576, 1995 | 108 | 1995 |
| An analytic net weighting approach for performance optimization in circuit placement RS Tsay, J Koehl Proceedings of the 28th ACM/IEEE Design Automation Conference, 620-625, 1991 | 107 | 1991 |
| Systems and methods for designing and making integrated circuits with consideration of wiring demand ratio FY Chang, SH Chen, TC Chen, RS Tsay, WK Mak US Patent 8,407,647, 2013 | 92 | 2013 |
| A unified approach to partitioning and placement (VLSI layout) RS Tsay, E Kuh IEEE Transactions on Circuits and Systems 38 (5), 521-533, 1991 | 75* | 1991 |
| Source-level timing annotation for fast and accurate TLM computation model generation KL Lin, CK Lo, RS Tsay 2010 15th Asia and South Pacific Design Automation Conference (ASP-DAC), 235-240, 2010 | 57 | 2010 |
| Performance-driven system partitioning on multi-chip modules M Shih, ES Kuh, RS Tsay [1992] Proceedings 29th ACM/IEEE Design Automation Conference, 53-56, 1992 | 47 | 1992 |
| A new method for floor planning using topological constraint reduction G Vijayan, RS Tsay IEEE transactions on computer-aided design of integrated circuits and …, 1991 | 45 | 1991 |
| Module placement for large chips based on sparse linear equations RS Tsay, ES Kuh, CP Hsu International journal of circuit theory and applications 16 (4), 411-423, 1988 | 37 | 1988 |
| Real-time tone-mapping processor with integrated photographic and gradient compression using 0.13 μm technology on an ARM SoC platform CT Chiu, TH Wang, WM Ke, CY Chuang, JS Huang, WS Wong, RS Tsay, ... Journal of Signal Processing Systems 64, 93-107, 2011 | 34 | 2011 |
| An effective synchronization approach for fast and accurate multi-core instruction-set simulation MH Wu, CY Fu, PC Wang, RS Tsay Proceedings of the seventh ACM international conference on Embedded software …, 2009 | 29 | 2009 |
| A new approach to sea-of-gates global routing TM Parng, RS Tsay 1989 IEEE International Conference on Computer-Aided Design, 52, 53, 54, 55 …, 1989 | 29 | 1989 |
| Early wirability checking and 2D congestion-driven circuit placement RS Tsay, SC Chang, J Thorvaldson [1992] Proceedings. Fifth Annual IEEE International ASIC Conference and …, 1992 | 25 | 1992 |
| Scan chain optimization: Heuristic and optimal solutions KD Boese, AB Kahng, RS Tsay UCLA CS Dept. Internal Rep, 1994 | 21 | 1994 |
| Automatic generation of Cycle Accurate and Cycle Count Accurate transaction level bus models from a formal model CK Lo, RS Tsay 2009 Asia and South Pacific Design Automation Conference, 558-563, 2009 | 20 | 2009 |
| Automatic generation of software TLM in multiple abstraction layers for efficient HW/SW co-simulation MH Wu, WC Lee, CY Chuang, RS Tsay 2010 Design, Automation & Test in Europe Conference & Exhibition (DATE 2010 …, 2010 | 19 | 2010 |
Chen-Kang (Trent) LoNVIDIA, National Tsing-Hua Univ.Verifierad e-postadress på cs.nthu.edu.tw
