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Pramod Udupa
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A hardware accelerated system for deep packet inspection
A Rao, P Udupa
Eighth ACM/IEEE International Conference on Formal Methods and Models for …, 2010
102010
A novel hierarchical low complexity synchronization method for OFDM systems
P Udupa, O Sentieys, P Scalart
2013 IEEE 77th Vehicular Technology Conference (VTC Spring), 1-5, 2013
82013
Windconv: A fused datapath cnn accelerator for power-efficient edge devices
G Mahale, P Udupa, KK Chandrasekharan, S Lee
IEEE Transactions on Computer-Aided Design of Integrated Circuits and …, 2020
72020
Accelerating numerical linear algebra kernels on a scalable run time reconfigurable platform
P Biswas, P Udupa, R Mondal, K Varadarajan, M Alle, SK Nandy, ...
2010 IEEE Computer Society Annual Symposium on VLSI, 161-166, 2010
72010
A block-parallel architecture for initial and fine synchronization in OFDM systems
P Udupa, O Sentieys, P Scalart
2013 IEEE International Conference on Communications (ICC), 4761-4765, 2013
52013
Accelerating depthwise convolution and pooling operations on Z-first storage CNN architectures
P Udupa, G Mahale, KK Chandrasekharan, S Lee
2020 IEEE International Symposium on Circuits and Systems (ISCAS), 1-5, 2020
42020
IKW: Inter-Kernel Weights for Power Efficient Edge Computing
P Udupa, G Mahale, K Kolar Chandrasekharan, S Lee
IEEE Access 8, 90450 - 90464, 2020
42020
Report on Design and Implementation of Line Following Car with Freescale S12X Microcontroller
A Rao, P Udupa, A Fell
Indian Institute of Science,(September 23, 2010), 2010
32010
Power-efficient hybrid traversal apparatus and method for convolutional neural network accelerator architecture
GV Mahale, PP Udupa, KK Chandrasekharan, SH Lee
US Patent App. 17/033,132, 2021
22021
Z-first reference neural processing unit for mapping winograd convolution and a method thereof
GV Mahale, PP Udupa, KKC HARAN, SH Lee
US Patent App. 17/239,892, 2021
12021
Apparatus and method with accelerating artificial neural network
GV Mahale, PP Udupa, JW Jang, KK Chandrasekharan, SH Lee
US Patent App. 18/296,165, 2023
2023
Methods and systems with convolutional neural network (cnn) performance
PP Udupa, KK Chandrasekharan, SH Lee
US Patent App. 16/935,500, 2021
2021
System and method for optimizing mixed radix fast fourier transform and inverse fast fourier transform
R Mundhada, P Udupa
US Patent 10,339,200, 2019
2019
Low Complexity, Parallel Algorithms, and Scalable Architectures for Real Time Coherent Optical OFDM Systems
P Udupa
Université de Rennes 1, 2014
2014
Algorithmes parallèles et architectures évolutives de faible complexité pour systèmes optiques OFDM cohérents temps réel
P Udupa
Rennes 1, 2014
2014
Design and Implementation of DSP algorithms for 100 Gbps Coherent Optical-OFDM (CO-OFDM) Systems
P Udupa, O Sentieys, L Bramerie
XXIVe Colloque Gretsi-Traitement du Signal et des Images, 1-4, 2013
2013
Design of Real Time FPGA Prototyping of 100Gb/s Optical MB-OFDM System and Beyond
P Udupa, O Sentieys, L Bramerie
Colloque National GDR SOC-SIP 2012, 1-3, 2012
2012
THÈSE/UNIVERSITÉ DE RENNES
P UDUPA
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Artiklar 1–18