| On the systematic creation of faithfully rounded truncated multipliers and arrays TA Drane, TM Rose, GA Constantinides IEEE Transactions on Computers 63 (10), 2513-2525, 2013 | 31 | 2013 |
| Correctly rounded constant integer division via multiply-add T Drane, W Cheung, G Constantinides 2012 IEEE International Symposium on Circuits and Systems (ISCAS), 1243-1246, 2012 | 22 | 2012 |
| Automatic datapath optimization using e-graphs S Coward, GA Constantinides, T Drane 2022 IEEE 29th Symposium on Computer Arithmetic (ARITH), 43-50, 2022 | 15 | 2022 |
| Method and apparatus for performing lossy integer multiplier synthesis TA Drane US Patent 8,862,652, 2014 | 10 | 2014 |
| Calculating apparatus and method for use in a maximum likelihood detector and/or decoder O Zaboronski, N Atkinson, RC Jackson, T Drane, A Vityaev US Patent 7,822,138, 2010 | 10 | 2010 |
| Automating constraint-aware datapath optimization using e-graphs S Coward, GA Constantinides, T Drane 2023 60th ACM/IEEE Design Automation Conference (DAC), 1-6, 2023 | 9 | 2023 |
| Method and apparatus for performing formal verification of polynomial datapath TA Drane, FR Exall US Patent 8,527,924, 2013 | 9 | 2013 |
| Method and apparatus for synthesising a sum of addends operation and an integrated circuit TA Drane, T Rose US Patent 8,943,447, 2015 | 7 | 2015 |
| Implementing fixed-point polynomials in hardware logic TA Drane US Patent 11,010,515, 2021 | 6 | 2021 |
| Partially and fully parallel normaliser TA Drane US Patent 9,703,525, 2017 | 6 | 2017 |
| Combining e-graphs with abstract interpretation S Coward, GA Constantinides, T Drane Proceedings of the 12th ACM SIGPLAN International Workshop on the State Of …, 2023 | 5 | 2023 |
| Partially and fully parallel normaliser TA Drane US Patent 10,223,068, 2019 | 5 | 2019 |
| Partially and fully parallel normaliser TA Drane US Patent 10,698,655, 2020 | 4 | 2020 |
| Abstract Interpretation on E-Graphs S Coward, GA Constantinides, T Drane arXiv preprint arXiv:2203.09191, 2022 | 3 | 2022 |
| Formal Verification of Transcendental Fixed-and Floating-point Algorithms using an Automatic Theorem Prover S Coward, L Paulson, T Drane, E Morini Formal Aspects of Computing 34 (2), 1-22, 2022 | 2 | 2022 |
| Partially and fully parallel normaliser TA Drane US Patent 10,977,000, 2021 | 2 | 2021 |
| Evaluating polynomials in hardware logic TA Drane US Patent 10,331,405, 2019 | 2 | 2019 |
| Lossy Polynomial Datapath Synthesis T Drane Imperial College London, 2014 | 2 | 2014 |
| Formal Verification and Validation of High-level Optimizations of Arithmetic Datapath Blocks D Theo, J Himanshu SNUG Awards, 2011 | 2 | 2011 |
| Formal Verification and Validation of High-Level Optimizations of Arithmetic Datapath Blocks T Drane, H Jain SNUG, 2011 | 2 | 2011 |
