|Nonlinear thermal stress/strain analyses of copper filled TSV (through silicon via) and their flip-chip microbumps|
CS Selvanayagam, JH Lau, X Zhang, SKW Seah, K Vaidyanathan, ...
IEEE Transactions on Advanced Packaging 32 (4), 720-728, 2009
|Development of 3-D silicon module with TSV for system in packaging|
N Khan, VS Rao, S Lim, HS We, V Lee, X Zhang, EB Liao, R Nagarajan, ...
IEEE Transactions on Components and Packaging Technologies 33 (1), 3-9, 2010
|The study of mechanical properties of Sn–Ag–Cu lead-free solders with different Ag contents and Ni doping under different strain rates and temperatures|
FX Che, WH Zhu, ESW Poh, XW Zhang, XR Zhang
Journal of Alloys and Compounds 507 (1), 215-224, 2010
|Development of through silicon via (TSV) interposer technology for large die (21× 21mm) fine-pitch Cu/low-k FCBGA package|
X Zhang, TC Chai, JH Lau, CS Selvanayagam, K Biswas, S Liu, D Pinjala, ...
2009 59th Electronic components and technology conference, 305-312, 2009
|High-density 3D-boron nitride and 3D-graphene for high-performance nano–thermal interface material|
M Loeblein, SH Tsang, M Pawlik, EJR Phua, H Yong, XW Zhang, CL Gan, ...
ACS nano 11 (2), 2033-2044, 2017
|Electromigration performance of Through Silicon Via (TSV)–A modeling approach|
YC Tan, CM Tan, XW Zhang, TC Chai, DQ Yu
Microelectronics Reliability 50 (9-11), 1336-1340, 2010
|Study on Cu protrusion of through-silicon via|
FX Che, WN Putra, A Heryanto, A Trigg, X Zhang, CL Gan
IEEE Transactions on Components, Packaging and Manufacturing Technology 3 (5 …, 2013
|TSV interposer fabrication for 3D IC packaging|
VS Rao, HS Wee, LWS Vincent, LH Yu, L Ebin, R Nagarajan, CT Chong, ...
2009 11th Electronics Packaging Technology Conference, 431-437, 2009
|Heterogeneous 2.5 D integration on through silicon interposer|
X Zhang, JK Lin, S Wickramanayaka, S Zhang, R Weerasekera, R Dutta, ...
Applied Physics Reviews 2 (2), 021308, 2015
|Modeling and design solutions to overcome warpage challenge for fan-out wafer level packaging (FO-WLP) technology|
FX Che, D Ho, MZ Ding, X Zhang
2015 IEEE 17th Electronics Packaging and Technology Conference (EPTC), 1-8, 2015
|Modeling stress in silicon with TSVs and its effect on mobility|
C Selvanayagam, X Zhang, R Rajoo, D Pinjala
IEEE Transactions on Components, Packaging and Manufacturing Technology 1 (9 …, 2011
|Thermo-mechanical finite element analysis in a multichip build up substrate based package design|
X Zhang, EH Wong, C Lee, TC Chai, Y Ma, PS Teo, D Pinjala, S Sampath
Microelectronics Reliability 44 (4), 611-619, 2004
|Effect of TSV interposer on the thermal performance of FCBGA package|
YYG Hoe, TG Yue, P Damaruganath, CT Chong, JH Lau, Z Xiaowu, ...
2009 11th Electronics Packaging Technology Conference, 778-786, 2009
|Design and development of a multi-die embedded micro wafer level package|
V Kripesh, VS Rao, A Kumar, G Sharma, KC Houe, Z Xiaowu, KY Mong, ...
2008 58th Electronic Components and Technology Conference, 1544-1549, 2008
|A novel method to predict die shift during compression molding in embedded wafer level package|
CH Khong, A Kumar, X Zhang, G Sharma, SR Vempati, K Vaidyanathan, ...
2009 59th Electronic Components and Technology Conference, 535-541, 2009
|A damage evolution model for thermal fatigue analysis of solder joints|
X Zhang, SWR Lee, YH Pao
J. Electron. Packag. 122 (3), 200-206, 2000
|Development of Large Die Fine-Pitch Cu/Low-FCBGA Package With Through Silicon via (TSV) Interposer|
TC Chai, X Zhang, JH Lau, CS Selvanayagam, P Damaruganath, ...
IEEE Transactions on Components, Packaging and Manufacturing Technology 1 (5 …, 2011
|Application of piezoresistive stress sensors in ultra thin device handling and characterization|
X Zhang, A Kumar, QX Zhang, YY Ong, SW Ho, CH Khong, V Kripesh, ...
Sensors and Actuators A: Physical 156 (1), 2-7, 2009
|Development of wafer-level warpage and stress modeling methodology and its application in process optimization for TSV wafers|
F Che, HY Li, X Zhang, S Gao, KH Teo
IEEE transactions on components, packaging and manufacturing technology 2 (6 …, 2012
|Board level solder joint failures by static and dynamic loads|
LB Tan, SKW Seah, EH Wong, X Zhang, VBC Tan, CT Lim
Proceedings of the 5th Electronics Packaging Technology Conference (EPTC …, 2003