| Flip chip technologies JH Lau McGraw-Hill Professional, 1996 | 986 | 1996 |
| Solder joint reliability of BGA, CSP, flip chip, and fine pitch SMT assemblies JH Lau, YH Pao (No Title), 1997 | 757 | 1997 |
| Ball grid array technology JH Lau (No Title), 1995 | 659 | 1995 |
| Low cost flip chip technologies: for DCA, WLCSP, and PBGA assemblies JH Lau McGraw Hill Professional, 2000 | 469 | 2000 |
| Solder joint reliability: theory and applications JH Lau Springer Science & Business Media, 1991 | 469 | 1991 |
| Mechanics of solder alloy interconnects DR Frear, SN Burchett, HS Morgan, JH Lau Springer Science & Business Media, 1994 | 421 | 1994 |
| Nonlinear thermal stress/strain analyses of copper filled TSV (through silicon via) and their flip-chip microbumps CS Selvanayagam, JH Lau, X Zhang, SKW Seah, K Vaidyanathan, ... IEEE transactions on advanced packaging 32 (4), 720-728, 2009 | 399 | 2009 |
| Thermal stress and strain in microelectronics packaging J Lau Springer Science & Business Media, 2012 | 363 | 2012 |
| Electronics manufacturing J Lau, CP Wong, NC Lee, R Lee McGraw-Hill, Inc., 2002 | 326 | 2002 |
| Overview and outlook of through‐silicon via (TSV) and 3D integrations JH Lau Microelectronics International 28 (2), 8-22, 2011 | 320 | 2011 |
| Electronic packaging: design, materials, process and reliability JH Lau McGraw-Hill, 1998 | 314 | 1998 |
| Chip Scale Package (CSP): Design, Materials, Process, Reliability & Applications JH Lau, SWR Lee McGraw-Hill, 1999 | 276 | 1999 |
| Thermal management of 3D IC integration with TSV (through silicon via) JH Lau, TG Yue 2009 59th Electronic Components and Technology Conference, 635-640, 2009 | 226 | 2009 |
| Chip on board: technology for multichip modules JH Lau Springer Science & Business Media, 1994 | 219 | 1994 |
| Development of 3-D silicon module with TSV for system in packaging N Khan, VS Rao, S Lim, HS We, V Lee, X Zhang, EB Liao, R Nagarajan, ... IEEE Transactions on Components and Packaging Technologies 33 (1), 3-9, 2010 | 206 | 2010 |
| Evolution, challenge, and outlook of TSV, 3D IC integration and 3D silicon integration JH Lau 2011 International symposium on advanced packaging materials (APM), 462-488, 2011 | 201 | 2011 |
| TSV manufacturing yield and hidden costs for 3D IC integration JH Lau 2010 Proceedings 60th electronic components and technology conference (ECTC …, 2010 | 192 | 2010 |
| Low-cost surface-mount compatible land-grid array (LGA) chip scale package (CSP) for packaging solder-bumped flip chips JH Lau US Patent 6,075,710, 2000 | 185 | 2000 |
| Advanced MEMS packaging JH Lau, CK Lee, CS Premachandran, Y Aibin McGraw-Hill, 2010 | 180 | 2010 |
| Recent advances and trends in advanced packaging JH Lau IEEE Transactions on Components, Packaging and Manufacturing Technology 12 …, 2022 | 167 | 2022 |
